Patent application number | Description | Published |
20080218147 | VOLTAGE REGULATOR - A voltage regulator having a MOS transistor driver is disclosed. The voltage regulator comprises a p-channel MOS transistor at a voltage input terminal Vin and a p-channel MOS transistor at a voltage output terminal Vout. A drain of the input side p-channel MOS transistor is connected to the voltage input terminal Vin. A threshold voltage or a voltage lower than the threshold voltage is applied to a gate of the input side p-channel MOS transistor. A drain of the output side p-channel MOS transistor is connected to the voltage output terminal Vout. | 09-11-2008 |
20090033420 | OPERATIONAL AMPLIFIER CIRCUIT, CONSTANT VOLTAGE CIRCUIT USING THE SAME, AND APPARATUS USING THE CONSTANT VOLTAGE CIRCUIT - A disclosed operational amplifier circuit with a multi-stage amplifier configuration provides fast-response and high withstand-voltage characteristics without using high withstand-voltage transistors as output transistors in its amplifying stages. The output voltage range of a differential amplifier circuit in a first stage is limited by voltage clamping based on a reverse withstand voltage of a bipolar diode. The output voltage range of an amplifier circuit in a second stage is limited by voltage clamping based on a reverse withstand voltage of another bipolar diode. A constant voltage circuit and an apparatus including such an operational amplifier circuit are also disclosed. | 02-05-2009 |
20110042745 | SEMICONDUCTOR DEVICE - A disclosed semiconductor device includes an MOS transistor having an N-type low-concentration drain region, a source region, an ohmic drain region, a P-type channel region, an ohmic channel region, a gate isolation film, and a gate electrode. The N-type low-concentration drain region includes two low-concentration drain layers in which the N-type impurity concentration of the upper layer is higher than that of the lower layer; the P-type channel region includes two channel layers in which the P-type impurity concentration of the upper layer is lower than that of the lower layer; and the gate electrode is formed on the P-type channel region and the N-type low-concentration drain region and disposed to be separated from the ohmic drain region when viewed from the top. | 02-24-2011 |
20120013383 | VOLTAGE CLAMP CIRCUIT AND INTEGRATED CIRCUIT INCORPORATING SAME - A voltage clamp circuit includes a power supply, a first element connected with the power supply to output a constant current, a third element configured to allow a current to pass through when a voltage of a predetermined value or more is applied; and a second element configured to output a voltage according to a voltage generated by the first and third elements. | 01-19-2012 |
20120032733 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SUPPLY VOLTAGE SUPERVISOR - A semiconductor integrated circuit device includes a power-supply terminal to which a power-supply voltage is input; and multiple MOS transistors including an Nch deplete mode MOS transistor functioning as a current source and at least one Pch enhancement mode MOS transistor formed on a silicon-on-insulator substrate including a silicon substrate, a buried-oxide film, and a silicon activate layer, each of the multiple MOS transistors dimensioned so that a bottom of a source diffusion layer and a bottom of a drain diffusion layer reach the buried-oxide film, the at least one Pch enhancement mode MOS transistor being connected to the supply terminal through the Nch depletion mode MOS transistor. The Nch depletion mode MOS transistor has electrical characteristics such that a source voltage thereof is higher than a silicon substrate voltage thereof and a saturation current of the Nch depletion mode MOS transistor is decreased. | 02-09-2012 |
20130127504 | METHOD FOR RESETTING PHOTOELECTRIC CONVERSION DEVICE, AND PHOTOELECTRIC CONVERSION DEVICE - A reset method of an photoelectric conversion device at least including a phototransistor having a first collector, a first base, and a first emitter, and a first field-effect transistor having a first source, a first drain, and a first gate, includes: connecting the first base, and one of the first source and the first drain of the first field-effect transistor by having a common region, or a continuous region, without a base electrode; supplying a base reset potential to the other of the first source and the first drain; and overlapping a time in which a first emitter potential is supplied to the first emitter and a time in which a first ON-potential that turns on the first field-effect transistor is supplied to the first gate. | 05-23-2013 |
20130187030 | SENSE CIRCUIT AND METHOD OF OPERATION THEREOF AND PHOTOELECTRIC CONVERSION ARRAY - A sense circuit includes a differential amplifier circuit including an inverting input section, a non-inverting input section and an output section, an electrical capacitor connected between the inverting input section and the output section, and a field effect transistor including a source, a drain, and a gate. One of the source and the drain is connected to the inverting input section, and the other of the source and the drain is connected to the output section. A reference potential is supplied to the non-inverting input section, and an output section of a photoelectric conversion cell having an added switching function is connected to the inverting input section. | 07-25-2013 |
20130240716 | METHOD OF VARYING GAIN OF AMPLIFYING PHOTOELECTRIC CONVERSION DEVICE AND VARIABLE GAIN PHOTOELECTRIC CONVERSION DEVICE - Provided is a method of varying the gain of an amplifying photoelectric conversion device and a variable gain photoelectric conversion device which are capable of achieving both signal processing under low illuminance and high-current processing under high light intensity, and thereby capable of securing a wide dynamic range. An amplifying photoelectric conversion part includes a photoelectric conversion element and amplification transistors forming a Darlington circuit. The sources and the drains of field-effect transistors are connected to the bases and the emitters of the amplification transistors, respectively. The gates of the field-effect transistors each function as a gain control part. | 09-19-2013 |
20140367550 | PHOTOELECTRIC CONVERSION DEVICE - A photoelectric conversion device includes a first output line, a second output line; and a photoelectric conversion cell. The photoelectric conversion cell further includes, a photoelectric conversion element configured to generate an output current corresponding to an intensity of incident light, a first switch element configured to transmit the first output current to the first output line according to a first control signal, and a second switch element configured to transmit the second output current to second output line according to a second control signal. As a result, the photoelectric conversion device can be provided to generate rapidly the image data with wide dynamic range without the need for complex control outside of the photoelectric conversion device. | 12-18-2014 |
20150070546 | IMAGING DEVICE, METHOD OF DRIVING IMAGING DEVICE, AND CAMERA - An imaging device includes at least one pixel having a phototransistor which converts light energy into signal charge and varies an amplification factor relative to the intensity of the received light energy, wherein the signal charge of the phototransistor is read out while receiving the light energy with the phototransistor for each pixel. | 03-12-2015 |
20150076572 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate, a plurality of photoelectric conversion elements arranged on the semiconductor substrate to collectively form an image sensor, a plurality of trenches each formed between the photoelectric conversion elements adjacent to each other, and a plurality of impurity diffusion layers each provided at a bottom of the trench at a position deeper than a p-n junction of the photoelectric conversion element. | 03-19-2015 |