Patent application number | Description | Published |
20140001611 | SEMICONDUCTOR PACKAGE | 01-02-2014 |
20140035157 | SEMICONDUCTOR PACKAGE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE MANUFACTURING MOLD - There is provided a semiconductor package including: at least one internal lead having at least one electronic component mounted on a surface thereof; a molding unit sealing the electronic component and the internal lead; at least one external lead extending from the internal lead and protruding outwardly from ends of the molding unit; and a stopper provided on the external lead. | 02-06-2014 |
20140117408 | UNIT POWER MODULE AND POWER MODULE PACKAGE COMPRISING THE SAME - Disclosed herein is a unit power module including: a first semiconductor chip having one surface on which a 1-1-th electrode and a 1-2-th electrode spaced apart from the 1-1-th electrode are formed and the other surface on which a 1-3-th electrode is formed, a second semiconductor chip having one surface on which a 2-1-th electrode is formed and the other surface on which a 2-2-th electrode is formed, a first metal plate contacting the 1-1-th electrode of the first semiconductor chip and the 2-1-th electrode of the second semiconductor chip, a second metal plate contacting the 1-2-th electrode of the first semiconductor chip and spaced apart from the first metal plate, a third metal plate contacting the 1-3-th electrode of the first semiconductor chip and the 2-2-th electrode of the second semiconductor chip, and a sealing member formed to surround the first metal plate, the second metal plate, and the third metal plate. | 05-01-2014 |
20140146487 | CONTACT PIN AND POWER MODULE PACKAGE HAVING THE SAME - Disclosed herein is a contact pin including: a deformation part elastically deformed; connection parts coupled to both ends of the deformation part; and contact parts coupled to the connection parts coupled to both ends of the deformation part, respectively, and having one end coupled to the connection part and the other end. | 05-29-2014 |
20140160691 | SEMICONDUCTOR MODULE AND METHOD OF MANUFACTURING THE SAME - There is provided a semiconductor module capable of being easily manufactured. The semiconductor module includes: a control part including at least one control device; and a power part including at least one power device, wherein any one of the control part and the power part includes contact pins having elasticity, and the control part and the power part are electrically connected to each other by the contact pins. | 06-12-2014 |
20140167237 | POWER MODULE PACKAGE - Disclosed herein is a power module package, including: a substrate; semiconductor chips mounted on one surface of the substrate; external connection terminals connected to one surface of the substrate; and a connecting member having one end contacting the semiconductor chips and the other end contacting the external connection terminals and electrically and mechanically connecting between the semiconductor chips and the external connection terminals. | 06-19-2014 |
20140167239 | POWER MODULE PACKAGE - Disclosed herein is a power module package including: a substrate including a metal layer, a first insulation layer formed on the metal layer, a first circuit pattern formed on the first insulation layer and including a first pad and a second pad spaced apart from the first pad, a second insulation layer formed on the first insulation layer to cover the first circuit pattern, and a second circuit pattern formed on the second insulation layer and including a third pad formed on a location corresponding to the first pad and a fourth pad spaced apart from the third pad; a semiconductor chip mounted on the second circuit pattern; one end being electrically connected to the semiconductor chip, and another end protruding from the outside, wherein the first pad and the third pad, and the second pad and the fourth pad have different polarities. | 06-19-2014 |
20140167242 | POWER MODULE PACKAGE - Disclosed herein is a power module package including: a first module configured of a first substrate having one surface and the other surface, a first semiconductor chip mounted on one surface of the first substrate, and a first sealing member formed to cover the first semiconductor chip mounted on one surface of the first substrate from both sides in a thickness direction of the first substrate and expose the other surface of the first substrate; and a case enclosing the first module. | 06-19-2014 |
20140183717 | SEMICONDUCTOR MODULE PACKAGE - Disclosed herein is a semiconductor module package, including: a first module including a first heat radiation substrate and one or more first semiconductor elements and having a first N terminal and a first P terminal formed at one end thereof; a second module including a second heat radiation substrate and one or more second semiconductor elements, having a second N terminal and a second P terminal formed at one end thereof, and disposed so as to face the first module; and a first output terminal formed by electrically connecting the first module to the second module. | 07-03-2014 |
20140185242 | POWER SEMICONDUCTOR MODULE - There is provided a power semiconductor module in which power semiconductor elements, integration of which may be difficult due to heating, are modularized. The power semiconductor module includes: a heat dissipation substrate electrically connected to a common connection terminal; and a plurality of electronic elements disposed on the heat dissipation substrate, wherein the electronic elements have varying spaces therebetween. | 07-03-2014 |
20150145076 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF - There is provided a semiconductor package including: an application specific integrated circuit (ASIC) chip including a first bump ball and a second bump ball formed inwardly of the first bump ball; a micro electro mechanical system (MEMS) sensor electrically connected to the second bump ball; a lead frame electrically connected to the first bump ball and including a through hole formed therein; and a molded part covering the ASIC chip, the MEMS sensor, and the lead frame, wherein the ASIC chip is disposed above the lead frame. | 05-28-2015 |
20150249891 | MICROPHONE PACKAGE - The microphone package includes: a package substrate including a lead frame and an insulating portion; and an acoustic device mounted on the package substrate and having a space formed in a lower surface thereof, wherein the package substrate includes an acoustic space connected to the space of the acoustic device. | 09-03-2015 |
Patent application number | Description | Published |
20110194333 | System and Method to Select a Reference Cell - A system and method to select a reference cell is disclosed. In a particular embodiment, a method is disclosed that includes receiving an address corresponding to a bit cell within a first bank of a memory. The method also includes accessing a second reference cell of a second bank of the memory in response to a first reference cell in the first bank being indicated as bypassed. | 08-11-2011 |
20120033490 | Generating a Non-Reversible State at a Bitcell Having a First Magnetic Tunnel Junction and a Second Magnetic Tunnel Junction - A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. | 02-09-2012 |
20120044755 | System and Method of Reference Cell Testing - In a particular embodiment, a method of testing a reference cell in a memory array includes coupling a first reference cell of a first reference cell pair of the memory array to a first input of a first sense amplifier of the memory array. The method also includes providing a reference signal to a second input of the first sense amplifier. The reference signal is associated with a second reference cell pair of the memory array. | 02-23-2012 |
20120057400 | System and Method for Shared Sensing MRAM - Resistance memory cells of MRAM arrays are designated as reference cells and programmed to binary 0 and binary 1 states, reference cells from one MRAM array at binary 0 and at binary 1 are concurrently accessed to obtain a reference voltage to read resistance memory cells of another MRAM array, reference cells from the other MRAM array at binary 0 and binary 1 are concurrently accessed to obtain a reference voltage to read resistance memory cells of the one MRAM array. | 03-08-2012 |
20120075906 | Resistance Based Memory Having Two-Diode Access Device - A resistance-based memory has a two-diode access device. In a particular embodiment, a method includes biasing a bit line and a sense line to generate a current through a resistance-based memory element via a first diode or a second diode. A cathode of the first diode is coupled to the bit line and an anode of the second diode is coupled to the sense line. | 03-29-2012 |
20120087184 | Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern - A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects. | 04-12-2012 |
20120188816 | Row-Decoder Circuit and Method with Dual Power Systems - A Spin-Transfer-Torque Magnetic Random Access Memory includes a dual-voltage row decoder with charge sharing for read operations. The dual-voltage row decoder with charge sharing for read operations reduces read-disturbance failure rates and provides a robust macro design with improved yields. Voltage from one of the power supplies can be applied during a write operation. | 07-26-2012 |
20120188817 | Read Sensing Circuit and Method with Equalization Timing - A Magnetic Random Access Memory (MRAM) includes read sensing circuitry having an equalizer device configured between a bit cell output node and a reference node of the bit cell. The equalizer is turned on to couple the output node to the reference node during an initial portion of a read operation and to decouple the output node from the reference node after an equalization delay period. A sense amplifier is enabled to provide a data output from the bit cell only after the delay period and decoupling of the output node from the reference node to provide balanced sensing speed of data represented by parallel and antiparallel state magnetic tunnel junctions (MTJs). | 07-26-2012 |
20120218815 | Magnetic Random Access Memory (MRAM) Read With Reduced Disburb Failure - Magnetic tunnel junctions (MTJs) in magnetic random access memory (MRAM) are subject to read disturb events when the current passing through the MTJ causes a spontaneous switching of the MTJ due to spin transfer torque (STT) from a parallel state to an anti-parallel state or from an anti-parallel state to a parallel state. Because the state of the MTJ corresponds to stored data, a read disturb event may cause data loss in MRAM devices. Read disturb events may be reduced by controlling the direction of current flow through the MTJ. For example, the current direction through a reference MTJ may be selected based on the state of the reference MTJ. In another example, the current direction through a data or reference MTJ may be alternated such that the MTJ is only subject to read disturb events during approximately half the read operations on the MTJ. | 08-30-2012 |
20130076390 | Programmable Logic Sensing in Magnetic Random Access Memory - A Magnetic Random Access Memory (MRAM) logic circuit includes read sensing circuitry having a first level corresponding to a first category of logic circuitry and a second logic level corresponding to a second category of logic circuitry. The logic circuitry may be switchable between circuitry having the first logic level and circuitry having the second logic level according to the category of the logic circuit being implemented. | 03-28-2013 |
Patent application number | Description | Published |
20080291134 | Plasma display - The present invention relates to a plasma display and a driving method thereof. In the plasma display, a plasma display panel (PDP) has different electrode arrangement configurations of discharge cells neighboring in a column direction and a closed barrier rib configuration. When the PDP has an alignment error in first and second electrodes, different rising slopes or falling slopes of a sustain pulse are applied to the first and second electrodes during a sustain period of a subfield. | 11-27-2008 |
20090012196 | CONDUCTIVE TONER SUPPLY ROLLER, METHOD OF MANUFACTURING SUPPLY ROLLER, AND ELECTROSTATIC RECORDING APPARATUS HAVING THE SUPPLY ROLLER - A conductive toner supply roller and a method of manufacturing the supply roller. The method includes preparing a polyurethane foam, impregnating the polyurethane foam with an impregnation solution including an electroconductive polymer, a binder resin, an electroconductive agent and a solvent, and drying the resulting polyurethane foam, cutting the dried polyurethane foam, and inserting a shaft into the cut polyurethane foam, and polishing an outer surface of the resulting polyurethane foam. The resulting conductive toner supply roller has a low or medium resistance, and may be user in an electrostatic recording apparatus such as a printer, a facsimile machine, a copier or the like. | 01-08-2009 |
20090316373 | PCB having chips embedded therein and method of manfacturing the same - Provided is a PCB having chips embedded therein, the PCB including a first core substrate that has a first chip embedded therein, the first chip having a plurality of first pads provided on the top surface thereof, and first circuit patterns provided on both surfaces thereof; a second core substrate that is disposed under the first core substrate so as to be spaced at a predetermined space from the first core substrate and has a second chip embedded therein, the second chip having a plurality of second pads provided on the bottom surface thereof, and second circuit patterns provided on both surfaces thereof; a first insulating layer that is laminated on the first core substrate and has a plurality of first conductive bumps formed therein, the first conductive bumps passing through the first insulating layer and being connected to the first circuit patterns and the first pads; a second insulating layer that is laminated between the first core substrate and the second core substrate and has a plurality of second conductive bumps formed therein, the second conductive bumps passing through the second insulating layer and connecting the first circuit patterns to the second circuit patterns; and a third insulating layer that is laminated under the second core substrate and has a plurality of third conductive bumps formed therein, the third conductive bumps passing through the third insulating layer and being connected to the second circuit patterns and the second pads. | 12-24-2009 |
20100002407 | SYSTEM-IN-PACKAGE MODULE AND MOBILE TERMINAL HAVING THE SAME - Provided is a system-in-package module including a system circuit board; a first element that is disposed on the system circuit board; a second element that is disposed on the first element so as to be shifted to one side from the center of the first element, while partially exposing the first element; a third element that is electrically connected to the system circuit board and is disposed on the second element; and a plurality of bump pads that are disposed on the bottom surface of the system circuit board. | 01-07-2010 |
20100301480 | SEMICONDUCTOR DEVICE HAVING A CONDUCTIVE STRUCTURE - A semiconductor device includes an interlayer insulating layer disposed on a substrate, the interlayer insulating layer comprising an opening exposing the substrate, a barrier layer pattern disposed within the opening, and a conductive pattern disposed on the barrier layer pattern, the conductive pattern having an oxidized portion extending out of the opening and a non-oxidized portion within the opening, wherein a width of the conductive pattern is determined by a thickness of the barrier layer pattern. | 12-02-2010 |
20110037141 | Semiconductor Device and Method of Fabricating the Same - A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region. | 02-17-2011 |
20120070976 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A method of manufacturing a semiconductor device includes forming a plurality of preliminary gate structures, forming a capping layer pattern on sidewalls of the plurality of preliminary gate structures, and forming a blocking layer on top surfaces of the plurality of preliminary gate structures and the capping layer pattern such that a void is formed therebetween. The method also includes removing the blocking layer and an upper portion of the capping layer pattern such that at least the upper sidewalls of the plurality of preliminary gate structures are exposed, and a lower portion of the capping layer pattern remains on lower sidewalls of the preliminary gate structures. The method further includes forming a conductive layer on at least the upper sidewalls of the plurality of preliminary gate structures, reacting the conductive layer with the preliminary gate structures, and forming an insulation layer having an air gap therein. | 03-22-2012 |
20120286369 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region. | 11-15-2012 |
20130320461 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region. | 12-05-2013 |
20150054173 | SEMICONDUCTOR PACKAGE, METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE AND STACK TYPE SEMICONDUCTOR PACKAGE - Disclosed herein are a semiconductor package, a method of manufacturing a semiconductor package, and a stack type semiconductor package. The semiconductor package according to a preferred embodiment of the present invention includes: a base substrate on which a first circuit layer is formed; a semiconductor device formed on the base substrate; a molding part formed on the base substrate and formed to enclose the first circuit layer and the semiconductor device; a first via formed on the first circuit layer and formed to penetrate through the molding part; and a second circuit layer formed on an upper surface of the molding part and integrally formed with the first via. | 02-26-2015 |
20150136451 | ELECTRONIC COMPONENT MODULE - There is provided an electronic component module including: a substrate on which an electronic component is mounted; at least one insulating member coupled to the substrate and having a surface on which a plating layer is formed; and a molded portion covering the electronic component and the at least one insulating member, wherein the insulating member is bonded to the substrate and a metal layer is formed on a bonding surface between the substrate and the insulating member. | 05-21-2015 |
20150137284 | MICROPHONE PACKAGE AND MOUNTING STRUCTURE THEREOF - There are provided a microphone package and a mounting structure thereof, allowing for an increase in a back volume, the microphone package including: a package substrate; an acoustic element mounted on the package substrate and having a space formed in a lower portion thereof; and at least one electronic component mounted on the package substrate and having a space formed in a lower portion thereof, wherein the package substrate includes an acoustic volume connecting the space of the acoustic element and the space of the electronic component. | 05-21-2015 |
20150153372 | MICRO ELECTRO MECHANICAL SYSTEMS SENSOR MODULE PACKAGE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a MEMS sensor module package. The MEMS sensor module package according to a preferred embodiment of the present invention includes: a printed circuit board (PCB); an application specific integrated circuit (ASIC) stacked on the PCB, one side of the ASIC being wire-bonded to the PCB; a MEMS sensor stacked on the ASIC; and a molding encapsulating the MEMS sensor and the ASIC with a resin. Accordingly, the electrical connection distance between a MEMS sensor and an ASIC is shortened so that electrical characteristic may be improved. Further, a sensor module package may be implemented in an ASIC size, so that size reduction may be achieved to meet the requirements of mobile devices. | 06-04-2015 |
20150153378 | MICRO ELECTRO MECHANICAL SYSTEMS SENSOR MODULE PACKAGE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a micro electro mechanical systems (MEMS) sensor module package. The MEMS sensor module package includes: an MEMS sensor; a base part formed so as to encapsulate the MEMS sensor with a resin; an external terminal provided on one surface of the base part; a through mold via (TMV) provided in the base part to electrically connect the external terminal and the MEMS sensor to each other; and an application specific integrated circuit (ASIC) stacked on the MEMS sensor. Compared to a MEMS sensor module package structure according to the prior art, the present invention is to reduce the entire size and implement electric shielding. | 06-04-2015 |
20150156575 | MICROPHONE PACKAGE AND METHOD OF MANUFACTURING THE SAME - There is provided a microphone package including: a microphone element formed on a semiconductor element; a mold enclosing the semiconductor element and the microphone element; and a conductive pattern formed on one surface of the mold and having a hole formed therein, the hole being connected to the microphone element. | 06-04-2015 |
20150179799 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region. | 06-25-2015 |
Patent application number | Description | Published |
20090091497 | Apparatus and Method For Collaborative Location Awareness Based on Weighted Maximum Likelihood Estimation - Provided is an apparatus and method for collaborative location awareness based on weighted maximum likelihood estimation (MLE), which is configured to improve accuracy of location awareness between nodes in estimating a location of a blind node. The method includes exchanging location awareness information with a reference node and a location-estimated blind node among peripheral nodes when location awareness is requested, performing location estimation based on weighted MLE, performing location calculation by using the location awareness information and an estimate obtained through the location estimation, and providing location awareness results of blind nodes. | 04-09-2009 |
20120008395 | Nonvolatile Memory Device and Method of Operating the Same - A nonvolatile memory device includes memory cell blocks each configured to comprise memory cells erased by an erase voltage, supplied to a word line, and a bulk voltage supplied to a bulk, a bias voltage generator configured to generate a first erase voltage, having a first pulse width and a first amplitude, in order to perform the erase operation of the memory cells and a second erase voltage, having a second pulse width narrower than the first pulse width and a second amplitude lower than the first amplitude, in order to perform an additional erase operation if an unerased memory cell is detected after the erase operation is performed, and a bulk voltage generator configured to generate the bulk voltage. | 01-12-2012 |
20140333733 | SYSTEM AND METHOD FOR PROVIDING 3-DIMENSIONAL IMAGES - Disclosed herein are a system and method for providing 3-Dimensional (3D) images. The system includes: an image capturing apparatus that acquires an image of a subject; an accelerometer that measures acceleration; and a controller that synchronizes a series of images acquired by the image capturing apparatus with the respective locations of the images of the series. The location of each image is calculated based on acceleration with respect to the image. 3D image regions of the individual images are identified based on an image acquisition reference region. Locations of one or more 3D image regions are then adjusted. The 3D image regions (adjusted or otherwise) are then use to generate 3D images. | 11-13-2014 |
20150042878 | METHODS FOR SELECTING RESOLUTION WITH MINIMUM DISTORTION VALUE AND DEVICES PERFORMING THE METHODS - A method of operating an image processing according to an example embodiment includes generating a plurality of encoded bitstreams having different resolutions using an original image output from a video source, generating a plurality of restored images corresponding to the plurality of encoded bitstreams, respectively, the plurality of restored images having a same resolution as a first resolution of the original image, and outputting one of the plurality of encoded bitstreams, based on the plurality of restored images and the original image. | 02-12-2015 |
20150114175 | TRANSMISSION SYSTEM OF HYBRID ELECTRIC VEHICLE - A transmission system of a hybrid electric vehicle may include a first shaft connected to an engine, a first hollow shaft disposed without rotational interference with the first shaft, selectively connected to the first shaft, and provided with a first output gear, a second hollow shaft disposed without rotational interference with the first hollow shaft and provided with a second output gear, a second shaft disposed in parallel with the first shaft and connected to the first shaft through a gear unit, a clutch selectively connecting the first shaft to the first hollow shaft, a first motor/generator operably connected to the second hollow shaft, and a second motor/generator operably connected to the second shaft. | 04-30-2015 |
20150119193 | TRANSMISSION SYSTEM OF HYBRID ELECTRIC VEHICLE - A transmission system of a hybrid electric vehicle may include a first shaft connected to an engine, a first hollow shaft disposed without rotational interference with the first shaft and provided with a first output gear, a second hollow shaft disposed without rotational interference with the first hollow shaft and provided with a second output gear, a second shaft disposed in parallel with the first shaft and operably connected to the first shaft and the first hollow shaft through a gear unit so as to selectively transmit torque of the first shaft to the first hollow shaft, a clutch selectively connecting the second shaft to the first hollow shaft, a first motor/generator operably connected to the second hollow shaft, and a second motor/generator operably connected to the second shaft. | 04-30-2015 |
20150146079 | ELECTRONIC APPARATUS AND METHOD FOR PHOTOGRAPHING IMAGE THEREOF - A method for photographing an image by an electronic apparatus includes displaying an image as a live view; setting a plurality of focus areas from the image; when a photographing command is received, obtaining an Auto Focus (AF) evaluation value of a photographed image; detecting a plurality of focus positions corresponding to the plurality of focus areas by analyzing the AF evaluation value; and obtaining and storing a plurality of images corresponding to the plurality of detected focus positions. | 05-28-2015 |
20150340097 | VOLTAGE GENERATOR AND SEMICONDUCTOR MEMORY DEVICE - A voltage generator includes a first trim unit and a second trim unit. The first trim unit generates a first voltage variable depending on temperature variation and a second voltage invariable irrespective of the temperature variation based on a power supply voltage, and performs a first trim operation by changing a level of the second voltage. The level of the second voltage at a first temperature becomes substantially the same as a level of the first voltage at the first temperature based on the first trim operation. The second trim unit generates an output voltage based on the power supply voltage, the first and second voltages, a reference voltage and a feedback voltage, and performs a second trim operation by adjusting variation of the output voltage depending on the temperature variation based on a result of the first trim operation. | 11-26-2015 |
Patent application number | Description | Published |
20100046986 | BELT HAVING A MEANDERING PREVENTION GUIDE AND IMAGE FORMING APPARATUS HAVING THE SAME - A belt configured to travel a continuous track may be incorporated for use in an image forming apparatus. The belt may include a guide member formed on a surface of the belt to prevent a belt from meandering off of the track, where the guide member may include a rubber sheet and a carbon black material having a primer particle diameter ranging from about 15 nm to about 35 nm. An image forming apparatus incorporating the belt with one or more guide members has an increased resistance to abrasion and mitigates belt meandering and image contamination. | 02-25-2010 |
20100054821 | ROLLER, DEVELOPING UNIT AND IMAGE FORMING APPARATUS HAVING THE SAME, AND METHOD OF MANUFACTURING ROLLER - A roller for use in a developing unit of an image forming apparatus may include a non-conductive shaft member and a non-conductive member to surround at least a part of an outer periphery of the shaft member. The shaft member may include a cylindrical rolling part and a pair of support parts formed to project from both ends of the rolling part in a lengthwise direction. The rolling part of the shaft member may be arranged opposite a charge roller in a developing unit and may rotate in contact with the charge roller to absorb and remove foreign substances adhered to a surface of the charge roller. | 03-04-2010 |
20100062353 | MULTICOLOR IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD THEREOF - A multicolor image forming apparatus which includes a developer image forming unit to form an image using a developer and a transferring unit to transfer the formed developer image to a recording medium, wherein the developer comprises a plurality of dark developers and one or more light developers, wherein the dark developers and the light developers each include a binder resin having a weight average molecular weight from about 50,000 Mw to about 160,000 Mw, and wherein about 50,000 Mw to about 160,000 Mw of the weight average molecular weight of the binder resin of the dark developer is larger than about 50,000 Mw to about 160,000 Mw of the weight average molecular weight of the binder resin of the light developer. | 03-11-2010 |
20110101572 | METHOD OF MANUFACTURING CHARGING ROLLER FOR ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS, AND CHARGING ROLLER MANUFACTURED BY THE SAME METHOD - Disclosed is a method of manufacturing a charging roller useable in an electrophotographic image forming apparatus and a charging roller manufactured according to the method. The method includes introducing a conductive agent and a mixture of a rubber-based material and polyolefin-based resin into an extruder, extruding the conductive agent and the mixture to obtain an extrudate, crosslinking the extrudate by electron beam irradiation, and polishing the crosslinked extrudate. The method results in an environmentally friendly and simplified manufacturing processes, and/or in the reduction of the manufacturing costs. | 05-05-2011 |
20110110690 | DEVELOPING ROLLER FOR ELECTROPHOTOGRAPHIC IMAGE FORMING APPARATUS, AND MANUFACTURING METHOD OF THE SAME - The disclosure provides a developing roller for an electrophotographic image forming apparatus, and a method of manufacturing the same. The developing roller includes a shaft member and a resilient member provided on the shaft member. The resilient member includes a conductive resilient layer in contact with the shaft member and a conductive resin layer defining the outer surface of the resilient member. The conductive resin layer includes a resin and a surface-treated metal oxide. The developing roller is capable of an increased amount of toner charging while stably maintaining optical density. | 05-12-2011 |
20110158705 | TONER SUPPLY ROLLER FOR ELECTROPHOTOGRAPHIC IMAGING APPARATUS AND METHOD OF PREPARING THE SAME - A toner supply roller of an electrophotographic imaging apparatus and a method of preparing the toner supply roller are provided. The toner supply roller includes a polyurethane foam, and a metal shaft inserted in the polyurethane foam along an axis thereof, wherein the polyurethane foam includes an ion-conductive agent and a binder, and the binder includes a resin having an amide bond. Accordingly, the toner supply roller including polyurethane foam provides an improved toner supply and prevents image defects. | 06-30-2011 |