Patent application number | Description | Published |
20080237774 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor substrate; a first semiconductor layer of a first conductivity type provided on a major surface of the semiconductor substrate and having lower doping concentration than the semiconductor substrate; a plurality of first semiconductor column regions of the first conductivity type provided on the first semiconductor layer; | 10-02-2008 |
20080246079 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device includes: a first semiconductor layer; a second semiconductor layer and a third semiconductor layer provided in an upper portion of the first semiconductor layer and alternately arranged parallel to an upper surface of the first semiconductor layer; a plurality of fourth semiconductor layers provided on the third semiconductor layer; a fifth semiconductor layer selectively formed in an upper surface of each of the fourth semiconductor layers; a control electrode; a gate insulating film; a first main electrode provided on a lower surface of the first semiconductor layer; and a second main electrode provided on the fourth and the fifth semiconductor layers. Sum of the amount of impurities in the second semiconductor layer and the amount of impurities in the third semiconductor layer at an end on the second main electrode side of the second semiconductor layer and the third semiconductor layer is smaller than the sum at a center of the second semiconductor layer and the third semiconductor layer in the direction from the first main electrode to the second main electrode. | 10-09-2008 |
20080246084 | POWER SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A power semiconductor device includes: a first semiconductor substrate; a second semiconductor layer; a plurality of third semiconductor pillar regions and a plurality of fourth semiconductor pillar regions that are provided in an upper layer of the second semiconductor layer and alternatively arranged along a direction parallel to an upper surface of the first semiconductor substrate; a first main electrode; and a second main electrode. A concentration of first-conductivity-type impurity in a connective portion between the second semiconductor layer and the third semiconductor pillar regions is lower than concentrations of first-conductivity-type impurity in portions of both sides of the connective portion in a direction from the second semiconductor layer to the third semiconductor pillar regions. | 10-09-2008 |
20080246085 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device includes: a first semiconductor layer; a second semiconductor layer and a third semiconductor layer that are provided above the first semiconductor layer and alternatively arranged along a direction parallel to an upper surface of the first semiconductor layer; a plurality of fourth semiconductor layers provided on some of immediately upper regions of the third semiconductor layers and connected to the third semiconductor layer; a fifth semiconductor layer; a control electrode; a gate insulating film; a first main electrode; and a second main electrode. An array period of the fourth semiconductor layers is larger than an array period of the second semiconductor layers. A thickness of a part of the gate insulating film disposed in an immediate upper region of a central portion between the fourth semiconductor layers is thicker than a thickness of a part of the gate insulating film disposed in the immediate upper region of the fourth semiconductor layer. Sheet impurity concentrations of the second semiconductor layer and the third semiconductor layer that are located in the central portion are higher than a sheet impurity concentration of the third semiconductor layer disposed in an immediately lower region of the fourth semiconductor layer. | 10-09-2008 |
20080290403 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes a first semiconductor layer, a second semiconductor layer provided on a major surface of the first semiconductor layer, a third semiconductor layer provided on the major surface and being adjacent to the second semiconductor layer, a termination semiconductor layer provided on the major surface of the first semiconductor layer in a termination region outside the device region, a channel stop layer, and a channel stop electrode. The channel stop layer is provided in contact with the termination semiconductor layer on the major surface of the first semiconductor layer in an outermost peripheral portion outside the termination semiconductor layer and has a higher impurity concentration than the termination semiconductor layer. The channel stop electrode is provided on at least part of a surface of the channel stop layer and projects toward the termination semiconductor layer beyond at least a superficial portion of the channel stop layer. | 11-27-2008 |
20080315299 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first first-conductivity-type semiconductor layer, a second first-conductivity-type semiconductor layer provided on a major surface of the first first-conductivity-type semiconductor layer; a third second-conductivity-type semiconductor layer being adjacent to the second first-conductivity-type semiconductor layer, provided on the major surface of the first first-conductivity-type semiconductor layer, and forming a periodic array structure in combination with the second first-conductivity-type semiconductor layer in a horizontal direction generally parallel to the major surface of the first first-conductivity-type semiconductor layer, and a sixth semiconductor layer located outside and adjacent to the periodic array structure of the second first-conductivity-type semiconductor layer and the third second-conductivity-type semiconductor layer, provided on the major surface of the first first-conductivity-type semiconductor layer, and having a lower impurity concentration than the periodic array structure. The amount of impurity in the outermost semiconductor layer of the first conductivity type or the second conductivity type adjacent to the sixth semiconductor layer in the periodic array structure is generally half the amount of impurity in the second first-conductivity-type semiconductor layer or the third second-conductivity-type semiconductor layer inside the outermost semiconductor layer. | 12-25-2008 |
20090090968 | SEMICONDUCTOR APPARATUS - A semiconductor apparatus includes: a semiconductor layer of a first conductivity type; a first main electrode provided on a frontside of the semiconductor layer; a second main electrode provided on a backside of the semiconductor layer, the backside being opposite to the frontside; a plurality of semiconductor regions of a second conductivity type provided in a surface portion of the semiconductor layer in a edge termination region outside a device region in which a main current path is formed in a vertical direction between the first main electrode and the second main electrode; and a plurality of buried semiconductor regions of the second conductivity type provided in the semiconductor layer in the edge termination region, spaced from the semiconductor regions, and spaced from each other. The buried semiconductor regions provided substantially at the same depth from the frontside of the semiconductor layer are numbered as first, second, . . . , n-th, sequentially from the one nearer to the device region, the n-th buried semiconductor regions provided at different depths from the frontside of the semiconductor layer are displaced toward the device region relative to the corresponding n-th semiconductor region, and the buried semiconductor region located deeper from the frontside of the semiconductor layer is displaced more greatly toward the device region. | 04-09-2009 |
20090273031 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a major surface of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the major surface of the first semiconductor layer, the third semiconductor layer forming a structure of periodical arrangement with the second semiconductor layer; a fourth semiconductor layer of the second conductivity type provided above the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively provided on a surface of the fourth semiconductor layer; a first main electrode electrically connected to the first semiconductor layer; a second main electrode provided to contact a surface of the fifth semiconductor layer and a surface of the fourth semiconductor layer; and a control electrode provided above the fifth semiconductor layer, the fourth semiconductor layer, and the second semiconductor layer via an insulative film. A portion is provided locally in the third semiconductor layer, the portion depleting at a voltage not more than one third of a voltage at which the second semiconductor layer and the third semiconductor layer completely deplete. | 11-05-2009 |
20100096692 | SEMICONDUCTOR DEVICE - A semiconductor device of the invention includes: a super junction structure of an n-type pillar layer and a p-type pillar layer; a base layer provided on the p-type pillar layer; a source layer selectively provided on a surface of the base layer; a gate insulating film provided on a portion being in contact with the base layer, a portion being in contact with the source layer and a portion being in contact with the n-type pillar layer on a portion of a junction between the n-type pillar layer and the p-type pillar layer; a control electrode provided opposed to the base layer, the source layer and the n-type pillar layer through the gate insulating film; and a source electrode electrically connected to the base layer, the source layer and the n-type layer. The source electrode is contact with the surface of the n-type pillar layer located between the control electrodes to form a Schottky junction. | 04-22-2010 |
20100123186 | POWER SEMICONDUCTOR DEVICE - In a vertical power semiconductor device having the super junction structure both in a device section and a terminal section, an n-type impurity layer is formed on the outer peripheral surface in the super junction structure. This allows an electric field on the outer peripheral surface of the super junction structure region to be reduced. Accordingly, a reliable vertical power semiconductor device of a high withstand voltage can be provided. | 05-20-2010 |
20100187598 | SEMICONDUCTOR DEVICE HAVING SWITCHING ELEMENT AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE HAVING SWITCHING ELEMENT - There is provided a semiconductor device having a switching element, including a first semiconductor layer including a first, second and third surfaces, a first electrode connected to the first semiconductor layer, a plurality of second semiconductor layers selectively configured on the first surface, a third semiconductor layer configured on the second semiconductor layer, a second electrode configured to be contacted with the second semiconductor layer and the third semiconductor layer, a gate electrode formed over the first semiconductor layer, a first region including a first tale region, a density distribution of crystalline defects being gradually increased therein, a peak region crossing a current path applying to a forward direction in a p-n junction, a second tale region continued from the peak region, and a second region including a third tale region, the density distribution of the crystalline defects being gradually increased therein. | 07-29-2010 |
20100200936 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor layer of a first conductivity type; a first semiconductor pillar region of the first conductivity type provided on a major surface of the semiconductor layer; a second semiconductor pillar region of a second conductivity type provided adjacent to the first semiconductor pillar region on the major surface of the semiconductor layer, the second semiconductor pillar region forming a periodic arrangement structure substantially parallel to the major surface of the semiconductor layer together with the first semiconductor pillar region; a first main electrode; a first semiconductor region of the second conductivity type; a second semiconductor region of the first conductivity type; a second main electrode; a control electrode; and a high-resistance semiconductor layer provided on the semiconductor layer in an edge termination section surrounding the first semiconductor pillar region and the second semiconductor pillar region. The high-resistance semiconductor layer has a lower dopant concentration than the first semiconductor pillar region. A boundary region is provided between a device central region and the edge termination section. The first semiconductor pillar region and the second semiconductor pillar region adjacent to the high-resistance semiconductor layer in the boundary region have a depth decreasing stepwise toward the edge termination section. | 08-12-2010 |
20100230750 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type formed on the first semiconductor layer and alternately arranged along at least one direction parallel to a surface of the first semiconductor layer; a first main electrode; a fourth semiconductor layer of the second conductivity type selectively formed in a surface of the second semiconductor layer and a surface of the third semiconductor layer; a fifth semiconductor layer of the first conductivity type selectively formed in a surface of the fourth semiconductor layer; a second main electrode; and a control electrode. At least one of the second and the third semiconductor layers has a dopant concentration profile along the one direction, the dopant concentration profile having a local minimum at a position except both ends thereof. | 09-16-2010 |
20100264489 | SEMICONDUCTOR DEVICE - A transistor contains a first semiconductor layer of a first conductivity type and a drift layer having a pillar structure in which a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type are alternately disposed in a direction parallel to a surface of the first semiconductor layer. The fourth semiconductor layer of the first conductivity type and the fifth semiconductor layer of the second conductivity type are alternately disposed and parallel to the drift layer. The fifth semiconductor layer has a larger amount of impurities than the fourth semiconductor layer. The sixth semiconductor layer of the first conductivity type and the seventh semiconductor layer of the second conductivity type are alternately disposed and parallel to the fourth and the fifth semiconductor layers. The seventh semiconductor layer has a smaller amount of impurities than the sixth semiconductor layer. | 10-21-2010 |
20100308399 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device includes: a first semiconductor layer of the first conduction type; second semiconductor layers of the first conduction type and third semiconductor layers of the second conduction type alternately provided transversely on the first semiconductor layer; fourth semiconductor layers of the second conduction type provided on the surfaces of the third semiconductor layers; fifth semiconductor layers of the first conduction type provided selectively on the surfaces of the fourth semiconductor layer; sixth semiconductor layers of the second conduction type and seventh semiconductor layers of the first conduction type alternately provided transversely on the second and the third semiconductor layers; a first main electrode electrically connected to the first semiconductor layer; an insulation film provided on the fourth semiconductor layers, the sixth semiconductor layers and the seventh semiconductor layers; a control electrode provided on the fourth semiconductor layers, the sixth semiconductor layers and the seventh semiconductor layers via the insulation film; and a second main electrode joined to the surfaces of the fourth semiconductor layers and the fifth semiconductor layers, the sixth semiconductor layers being connected to the fourth semiconductor layers and to at least one of the third semiconductor layers, which is provided between two of the fourth semiconductor layers, and an impurity concentration of the third semiconductor layers provided below the sixth semiconductor layers being higher than an impurity concentration of the third semiconductor layers provided under the fourth semiconductor layers. | 12-09-2010 |
20110006364 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first-conductivity-type semiconductor layer, a first and second-conductivity-type semiconductor pillar regions, a second and first-conductivity-type semiconductor regions, a first and second main electrodes, and a control electrode. Each of the first and second-conductivity-type pillar regions extends in a first direction and is alternately provided along a second direction generally perpendicular to the first direction. The second-conductivity-type semiconductor region is provided in a cell region and connected to the second-conductivity-type semiconductor pillar region. The first-conductivity-type semiconductor region is selectively provided in a surface of the second-conductivity-type semiconductor region. The first main electrode is connected to the first-conductivity-type semiconductor layer. The second main electrode is connected to the first and second-conductivity-type semiconductor region. The control electrode is configured to control a current path between the first-conductivity-type semiconductor region and the first-conductivity-type semiconductor pillar region. | 01-13-2011 |
20110018055 | POWER SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a power semiconductor device includes a first semiconductor layer, and first, second and third semiconductor regions. The first semiconductor layer has a first conductivity type. The first semiconductor regions have a second conductivity type, and are formed with periodicity in a lateral direction in a second semiconductor layer of the first conductivity type. The second semiconductor layer is provided on a major surface of the first semiconductor layer in a device portion with a main current path formed in a vertical direction generally perpendicular to the major surface and in a terminal portion provided around the device portion. The second semiconductor region has the first conductivity type and is a portion of the second semiconductor layer sandwiched between adjacent ones of the first semiconductor regions. The third semiconductor regions have the second conductivity type and are provided below the first semiconductor regions in the terminal portion. | 01-27-2011 |
20110049615 | POWER SEMICONDUCTOR DEVICE - According to one embodiment, a power semiconductor device includes a second semiconductor layer of a first conductivity type and a third semiconductor layer of a second conductivity type periodically disposed repeatedly along a surface of the first semiconductor layer on a first semiconductor layer of the first conductivity type. A first main electrode is provided to electrically connect to the first semiconductor layer. A fourth semiconductor layer of the second conductivity type is provided to connect to the third semiconductor layer. Fifth semiconductor layers of the first conductivity type are selectively provided in the fourth semiconductor layer surface. A second main electrode is provided on a surface of the fourth and fifth semiconductor layers. A control electrode is provided on a surface of the fourth, fifth, and second semiconductor layers via a gate insulating film. First insulating films are provided by filling a trench made in the second semiconductor layer. | 03-03-2011 |
20110215418 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of the first conductivity type, a first main electrode, a third semiconductor region of a second conductivity type, a second main electrode, and a plurality of embedded semiconductor regions of the second conductivity type. The second semiconductor region is formed on a first major surface of the first semiconductor region. The first main electrode is formed on a face side opposite to the first major surface of the first semiconductor region. The third semiconductor region is formed on a second major surface of the second semiconductor region on a side opposite to the first semiconductor region. The second main electrode is formed to bond to the third semiconductor region. The embedded semiconductor regions are provided in a termination region. A distance between the embedded semiconductor region and the second major surface along a direction from the second major surface toward the first major surface becomes longer toward outside from the device region. | 09-08-2011 |
20110227154 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type formed on the first semiconductor layer; a first buried layer of the first conductivity type selectively formed in the second semiconductor layer and having a first peak impurity concentration at a first depth; a second buried layer of a second conductivity type selectively formed in the second semiconductor layer and having a second peak impurity concentration at a second depth; a base layer of the second conductivity type selectively formed in the second semiconductor layer and overlapping with an upper portion of the second buried layer; a source layer of the first conductivity type selectively formed in the base layer; and a gate electrode formed on the base layer and on the second semiconductor layer above the first buried layer with a gate insulating film being interposed therebetween. | 09-22-2011 |
20110260243 | POWER SEMICONDUCTOR DEVICE - According to one embodiment, a power semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type and a third semiconductor layer of a second conductivity type, a fourth semiconductor layer, a fifth semiconductor layer, a first and second main electrode, a first and second insulating film and a control electrode. The second and third layers are provided periodically on the first layer. The fourth layer is provided on the third layer. The fifth layer is selectively provided on the fourth layer. The first film is provided on sidewalls of a trench that reaches from a surface of the fifth layer to the second layer. The second film is provided closer to a bottom side of the trench than the first film and has a higher permittivity than the first film. The control electrode is embedded in the trench. | 10-27-2011 |
20120012929 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film. The trench penetrates through the fourth semiconductor layer from a surface of the fifth semiconductor layer and is in contact with the second semiconductor layer. The first main electrode is connected to the first semiconductor layer. The second main electrode is connected to the fourth semiconductor layer and the fifth semiconductor layer. The sixth semiconductor layer is provided between the fourth semiconductor layer and the second semiconductor layer. An impurity concentration of the sixth semiconductor layer is higher than an impurity concentration of the second semiconductor layer. | 01-19-2012 |
20120056262 | SEMICONDUCTOR DEVICE - According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the first conductivity type, an embedded electrode, a control electrode, a fourth semiconductor layer of the second conductivity type, a first main electrode, and a second main electrode. The second semiconductor layer is provided on the first semiconductor layer. The third semiconductor layer is provided on the second semiconductor layer. The embedded electrode is provided in a first trench via a first insulating film. The first trench penetrates through the second semiconductor layer from a surface of the third semiconductor layer to reach the first semiconductor layer. The control electrode is provided above the embedded electrode via a second insulating film in the first trench. The fourth semiconductor layer is selectively provided in the first semiconductor layer and is connected to a lower end of a second trench. The second trench penetrates through the second semiconductor layer from the surface of the third semiconductor layer to reach the first semiconductor layer. The first main electrode is electrically connected to the first semiconductor layer. The second main electrode is provided in the second trench and connected to the second semiconductor layer, the third semiconductor layer and the fourth semiconductor layer. The embedded electrode is electrically connected to one of the second main electrode and the control electrode. A Schottky junction formed of the second main electrode and the first semiconductor layer is formed at a sidewall of the second trench. | 03-08-2012 |
20120068258 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a semiconductor device includes a first main electrode, a control electrode, an extraction electrode, a second insulating film, a plurality of contact electrodes, and a control terminal. The first main electrode is electrically connected to a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type selectively provided on a surface of the first semiconductor region. The control electrode is provided on the first semiconductor region via a first insulating film. The extraction electrode is electrically connected to the control electrode. The second insulating film is provided on the first main electrode and the extraction electrode. The plurality of contact electrodes are provided in an inside of a plurality of first contact holes formed in the second insulating film and are electrically connected to the extraction electrode. The control terminal covers portions of the first main electrode provided on the first semiconductor region, on the second semiconductor region, and on the control electrode, respectively, and the extraction electrode, is electrically connected to the plurality of contact electrodes, and is electrically insulated from the first main electrode by the second insulating film. | 03-22-2012 |
20120074461 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - According to an embodiment, a semiconductor device includes a second semiconductor layer provided on a first semiconductor layer and including first pillars and second pillars. A first control electrode is provided in a trench of the second semiconductor layer and a second control electrode is provided on the second semiconductor layer and connected to the first control electrode. A first semiconductor region is provided on a surface of the second semiconductor layer except for a portion under the second control electrode. A second semiconductor region is provided on a surface of the first semiconductor region, the second semiconductor region being apart from the portion under the second control electrode and a third semiconductor region is provided on the first semiconductor region. A first major electrode is connected electrically to the first semiconductor layer and a second major electrode is connected electrically to the second and the third semiconductor region. | 03-29-2012 |
20120074491 | POWER SEMICONDUCTOR DEVICE - In general, according to one embodiment, a power semiconductor device includes a first pillar region, a second pillar region, and an epitaxial layer of a first conductivity type on a first semiconductor layer. The first pillar region is composed of a plurality of first pillar layers of a second conductivity type and a plurality of second pillar layers of the first conductivity type alternately arranged along a first direction. The second pillar region is adjacent to the first pillar region along the first direction and includes a third pillar layer of the second conductivity type, a fourth pillar layer of the first conductivity type, and a fifth pillar layer of the second conductivity type in this order along the first direction. A plurality of second base layers of the second conductivity type electrically connected, respectively, onto the third pillar layer and the fifth pillar layer and spaced from each other. | 03-29-2012 |