Patent application number | Description | Published |
20130056793 | PROVIDING GROUP V AND GROUP VI OVER PRESSURE FOR THERMAL TREATMENT OF COMPOUND SEMICONDUCTOR THIN FILMS - Embodiments of the invention provide methods for forming high quality, low resistivity Group III-V or Group II-VI compounds. In one embodiment, the method includes growing a compound semiconductor layer having a n-type or p-type dopant over a substrate, the compound semiconductor layer comprising at least a first component and a second component, and the second component has a vapor pressure relatively higher than the first component, forming a supplemental layer consisted essentially of the second component at or near an upper surface of the compound semiconductor layer, and anneal the substrate. A capping layer may be formed on the supplemental layer to help prevent loss of crystallinity of the second component at elevated temperatures. An overpressure of the second component gas may be provided onto an exposed surface of the substrate during annealing to enhance the surface morphology of the compound semiconductor layer. | 03-07-2013 |
20130288460 | PROCESS CHAMBER HAVING SEPARATE PROCESS GAS AND PURGE GAS REGIONS - Embodiments of the present invention generally relate to chambers and methods of processing substrates therein. The chambers generally include separate process gas and purge gas regions. The process gas region and purge gas region each have a respective gas inlet and gas outlet. The methods generally include positioning a substrate on a substrate support within the chamber. The plane of the substrate support defines the boundary between a process gas region and purge gas region. Purge gas is introduced into the purge gas region through at least one purge gas inlet, and removed from the purge gas region using at least one purge gas outlet. The process gas is introduced into the process gas region through at least one process gas inlet, and removed from the process gas region through at least one process gas outlet. The process gas is thermally decomposed to deposit a material on the substrate. | 10-31-2013 |
20140199785 | MULTIZONE CONTROL OF LAMPS IN A CONICAL LAMPHEAD USING PYROMETERS - A method and apparatus for processing a semiconductor substrate is described. The apparatus is a process chamber having an optically transparent upper dome and lower dome. Vacuum is maintained in the process chamber during processing. The upper dome is thermally controlled by flowing a thermal control fluid along the upper dome outside the processing region. Thermal lamps are positioned proximate the lower dome, and thermal sensors are disposed among the lamps. The lamps are powered in zones, and a controller adjusts power to the lamp zones based on data received from the thermal sensors. | 07-17-2014 |
20140273419 | MULTIZONE CONTROL OF LAMPS IN A CONICAL LAMPHEAD USING PYROMETERS - A substrate processing apparatus is provided. The substrate processing apparatus includes a vacuum chamber having a dome and a floor. A substrate support is disposed inside the vacuum chamber. A plurality of thermal lamps are arranged in a lamphead and positioned proximate the floor of the vacuum chamber. A reflector is disposed proximate the dome, where the reflector and the dome together define a thermal control space. The substrate processing apparatus further includes a plurality of power supplies coupled to the thermal lamps and a controller for adjusting the power supplies to control a temperature in the vacuum chamber. | 09-18-2014 |
20150047566 | APPARATUS FOR IMPURITY LAYERED EPITAXY - Embodiments of the disclosure relate to an apparatus for processing a semiconductor substrate. The apparatus includes a process chamber having a substrate support for supporting a substrate, a lower dome and an upper dome opposing the lower dome, a plurality of gas injects disposed within a sidewall of the process chamber. The apparatus includes a gas delivery system coupled to the process chamber via the plurality of gas injects, the gas delivery system includes a gas conduit providing one or more chemical species to the plurality of gas injects via a first fluid line, a dopant source providing one or more dopants to the plurality of gas injects via a second fluid line, and a fast switching valve disposed between the second fluid line and the process chamber, wherein the fast switching valve switches flowing of the one or more dopants between the process chamber and an exhaust. | 02-19-2015 |
20150050753 | ACCELERATED RELAXATION OF STRAIN-RELAXED EPITAXIAL BUFFERS BY USE OF INTEGRATED OR STAND-ALONE THERMAL PROCESSING - Implementations of the present disclosure generally relate to methods and apparatus for forming a film on a substrate. More particularly, implementations of the present disclosure relate to methods and apparatus for heteroepitaxial growth of crystalline films. In one implementation, a method of heteroepitaxial deposition of a strain relaxed buffer (SRB) layer on a substrate is provided. The method comprises epitaxially depositing a buffer layer over a dissimilar substrate, rapidly heating the buffer layer to relax the buffer layer, rapidly cooling the buffer layer and determining whether the buffer layer has achieved a desired thickness. | 02-19-2015 |
20150099350 | ENABLING HIGH ACTIVATION OF DOPANTS IN INDIUM-ALUMINUM-GALIUM-NITRIDE MATERIAL SYSTEM USING HOT IMPLANTATION AND NANOSECOND ANNEALING - Embodiments of the present disclosure generally relate to doping and annealing substrates. The substrates may be doped during a hot implantation process, and subsequently annealed using a nanosecond annealing process. The combination of hot implantation and nanosecond annealing reduces lattice damage of the substrates and facilitates a higher dopant concentration near the surface of the substrate to facilitate increased electrical contact with the substrate. An optional capping layer may be placed over the substrate to reduce outgassing of dopants or to control dopant implant depth. | 04-09-2015 |
20150311292 | UTILIZATION OF ANGLED TRENCH FOR EFFECTIVE ASPECT RATIO TRAPPING OF DEFECTS IN STRAIN-RELAXED HETEROEPITAXY OF SEMICONDUCTOR FILMS - Embodiments of the present disclosure relate to reducing dislocation density in a heteroepitaxial growth film and devices including heteroepitaxial films with reduced dislocation density. According to embodiments of the present disclosure, sidewalls of high aspect ratio trenches may be tilted or angled to allow defects in crystalline material formed in the high aspect ratio trenches to be terminated in the tilted sidewalls, including defects propagating along the length of the high aspect ratio trenches. Embodiments of the present disclosure may be used to reduce defects in heteroepitaxial growth on silicon (Si) for microelectronic applications, such as high mobility channels using Group III-V elements in field effect transistors. | 10-29-2015 |