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Sungsoo
Sungsoo Hong, Goyang-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20120163037 | RESONANT CONVERTER - Disclosed herein is a resonant converter, including: a power conversion circuit alternately switching applied DC power to output a predetermined level of output power; and a control circuit fixing an operating frequency and controlling the level of the output power by varying the comparison voltage level that is a comparison target of the operating frequency, by determining that a short circuit occurs when the output current of the power conversion circuit is a reference current or more by comparing the output current of the power conversion circuit with the reference current. By this configuration, the output current can be constantly controlled even when the short circuit occurs in the output of the resonant converter. | 06-28-2012 |
Sungsoo Hong, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20130086232 | METHODS AND APPARATUS FOR REGISTERING A DEVICE TO SERVER - A method for registering a device in a server is provided. The method includes connecting a first device positioned in a certain area to a server; and registering a second device by transmitting identification information of the second device positioned in the certain area to the server by the first device, and storing the identification information of the second device in the server. | 04-04-2013 |
| 20130086644 | METHOD AND APPARATUS FOR COMMUNICATION CONNECTION SERVICE - Methods and apparatus are provided for communication connection service. Identification information of a second device is acquired. An inquiry about whether to register the second device as a favorite device is displayed. A registration request message is sent to a server, when a request to register the second device as the favorite device is inputted in response to the inquiry. The registration request message includes the identification information of the second device. A registration response message is received from the server in response to the registration request message. A user interface of the first device is controlled to provide feedback informing of a success or a failure in registering the second device as the favorite device based on the registration response message. | 04-04-2013 |
Sungsoo Kang, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100322186 | IP HANDOFF METHOD IN MOBILE AGENT PLATFORM ENVIRONMENT - Provided is an Internet protocol (IP) handoff method in a mobile agent platform (MAP). Accordingly, when an IP address of a mobile node (MN) is changed while the MN moves from an MAP to an adjacent MAP, the two MAPs generate border lists so as to share information on the MN, so that it is possible to perform a rapid IP handoff. | 12-23-2010 |
Sungsoo Kang, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20120163256 | NETWORK SYSTEM AND USER DEVICE, CALL-PROCESSING DEVICE, AND NETWORK BRIDGE FOR THE SYSTEM - Disclosed is a network system including: a transmitting terminal dividing and transmitting data into a plurality of data pieces; a plurality of bridges each receiving the plurality of data pieces and transmitting the divided data pieces to the receiving terminal; and a call manager managing communication among the transmitting terminal, the receiving terminal, and the plurality of bridges, wherein the bridge uses the same identifier system as the transmitting terminal and the receiving terminal. | 06-28-2012 |
| 20120163295 | COMMUNICATION APPARATUS AND METHOD - A mobile terminal in a sensor network selects one of the sensors nodes in the sensor network as an upstream agent, and piggybacks a list of neighboring sensor nodes found in the upstream agent selection process on an upstream packet and transmits the upstream packet to a gateway through the upstream agent. The gateway in the sensor network selects one of the neighboring sensor nodes as a downstream agent using state information of the neighboring sensor nodes in the list, and transmits a downstream packet to the mobile terminal through the selected downstream agent. | 06-28-2012 |
Sungsoo Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100059866 | Semiconductor Device and Method of Forming Vertically Offset Bond on Trace Interconnects on Recessed and Raised Bond Fingers - A semiconductor device has a vertically offset bond on trace (BOT) interconnect structure. The vertical offset is achieved by forming a first conductive layer extending above a surface of a carrier. The first conductive layer is pressed into a surface of a substrate so that the first conductive layer is recessed below the surface of the substrate. The carrier is removed. A second conductive layer is formed above the surface of the substrate to create the vertical offset between the first and second conductive layers. The vertical offset is about 20 micrometers. A conductive via is formed through the substrate. Bond wire bumps are formed on the first and second conductive layers. The bond wire bumps are about 10 micrometers in height. A seed layer is formed over the carrier prior to forming the first conductive layer and removed after forming the second conducive layer. | 03-11-2010 |
| 20110121452 | Semiconductor Device Having Vertically Offset Bond on Trace Interconnects on Recessed and Raised Bond Fingers - A semiconductor device includes a substrate, a first recessed conductive layer embedded and recessed into a first surface of the substrate, and a first raised conductive layer disposed above the first surface. A first vertical offset exists between an upper surface of the first recessed conductive layer and an upper surface of the first raised conductive layer. The device includes a second recessed conductive layer embedded and recessed into a second surface of the substrate. The second surface of the substrate is opposite the first surface. The device includes a second raised conductive layer disposed beneath the second surface and an interconnect structure disposed on the first recessed and raised conductive layers and the second recessed and raised conductive layers. A second vertical offset exists between a lower surface of the second recessed conductive layer and a lower surface of the second recessed conductive layer. | 05-26-2011 |
| 20120181690 | Semiconductor Device Having Vertically Offset Bond on Trace Interconnects on Recessed and Raised Bond Fingers - A semiconductor device includes a substrate, a first recessed conductive layer embedded and recessed into a first surface of the substrate, and a first raised conductive layer disposed above the first surface. A first vertical offset exists between an upper surface of the first recessed conductive layer and an upper surface of the first raised conductive layer. The device includes a second recessed conductive layer embedded and recessed into a second surface of the substrate. The second surface of the substrate is opposite the first surface. The device includes a second raised conductive layer disposed beneath the second surface and an interconnect structure disposed on the first recessed and raised conductive layers and the second recessed and raised conductive layers. A second vertical offset exists between a lower surface of the second recessed conductive layer and a lower surface of the second recessed conductive layer. | 07-19-2012 |
Sungsoo Kim, Daegu KR
| Patent application number | Description | Published |
|---|---|---|
| 20090115730 | Data input device and method thereof - Disclosed is a data input device and method thereof. The data input device comprises one or more character input buttons and character designation buttons, each having two operating states, input signal generators corresponding respectively to the plurality of buttons and generating input signals when the buttons are pressed, and an input data information generator for generating input data information based on the input signals from the input signal generators, characterized in that said input data information generator includes a memory for storing a button generator connection list showing connection relationship between each button and each corresponding input signal generator, a character assignment list showing relationship each character input button and characters to be assigned to each character input button and a character designation button list showing relationship each character designation button and characters to be designated as input state by each character designation button, and that said input data information generator groups the input signals generated from the input signal generators two by two according to the generation order and determines one character to be designated by the character designation button corresponding to one of each input signal group among the characters to be assigned to the character input button corresponding to the other of each input signal group as an input character based on the three lists stored in the memory. | 05-07-2009 |
Sungsoo Kim, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100028785 | ELECTROLYTE FOR LITHIUM ION SECONDARY BATTERY AND LITHIUM ION SECONDARY BATTERY INCLUDING THE SAME - An electrolyte for a lithium ion secondary battery is provided. The electrolyte includes a non-aqueous organic solvent, a lithium salt, an ionic liquid and an additive. The additive has a lowest unoccupied molecular orbital (LUMO) level of −0.5 to 1.0 eV and a highest occupied molecular orbital (HOMO) level lower than −11.0 eV. Further provided is a lithium ion secondary battery including the electrolyte. The battery is advantageous in terms of overcharge safety and heat stability. In addition, the battery has improved high-efficiency properties and cycle life characteristics. | 02-04-2010 |
Sungsoo Lee, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100110793 | Flash Memory Device and Memory System Including the Same - Provided is a flash memory device. The flash memory device includes a memory cell array, and a voltage generator. The memory cell array is connected to a plurality of word lines. The voltage generator generates a program voltage which is supplied to a selected word line of the word lines and a pass voltage which is supplied to a non-selected word line of the word lines, in a program operation. The voltage generator varies a level of the pass voltage with a temperature. | 05-06-2010 |
| 20100110815 | Non-Volatile Memory Device Having Temperature Compensator and Memory System Thereof - Provided is a semiconductor memory device. The semiconductor memory device includes: a voltage generator adjusting a DC voltage supplied into the semiconductor memory device according to a current temperature; and a control logic activating a temperature detection operation of the voltage generator and an adjustment operation of the DC voltage according to an operation mode, wherein the voltage generator adjusts the DC voltage according to offset information about the semiconductor memory device. | 05-06-2010 |
Sungsoo Lee, Seongnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100110786 | Nonvolatile memory device, memory system including the same, and memory test system - Provided are a nonvolatile memory device and a memory test system. The nonvolatile memory device includes a temperature compensator to calculate a trim value for regulating a characteristic of the nonvolatile memory device that varies with temperature in response to a test signal. The memory test system includes a plurality of nonvolatile memories and a tester. Each of the nonvolatile memories includes a temperature compensator. The tester tests the plurality of nonvolatile memories. The temperature compensator calculates a trim value for regulating a characteristic of the nonvolatile memory device that varies with temperature in response to a test signal of the tester. | 05-06-2010 |
| 20110222348 | Nonvolatile Memory Devices Having Memory Cell Arrays with Unequal-Sized Memory Cells and Methods of Operating Same - Nonvolatile memory devices include a two-dimensional array of nonvolatile memory cells having a plurality of memory cells of unequal size therein. These memory cells may include those that have unequal channel widths associated with respective word lines and those having unequal channel lengths associated with respective bit lines that are connected to corresponding strings of nonvolatile memory cells (e.g., NAND-type strings). Control circuitry is also provided that is electrically coupled to the two-dimensional array of nonvolatile memory cells. This control circuitry may operate to concurrently program first and second nonvolatile memory cells having unequal sizes from an erased state (e.g., logic 1) to an equivalent programmed state (e.g., logic 0). This is done by establishing unequal first and second word line-to-channel region voltages in the first and second nonvolatile memory cells, respectively, during an operation to program a row of memory cells in the two-dimensional array of nonvolatile memory cells, which includes the first and second nonvolatile memory cells of unequal size. | 09-15-2011 |
Sungsoo Lim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090144735 | APPARATUS AND METHOD FOR GENERATING USER INTERFACE BASED ON TASK SERVICE - An apparatus for generating a task-based UI includes a task ontology unit for maintaining task information with respect to the task, a device ontology unit for maintaining device information with respect to a device, a UI description generation unit for reading the task information and/or the device information using the task ontology unit and/or the device ontology unit, respectively, and generating UI description information from the read task information and/or the read device information, the UI description information being made by a task-based language, and a UI description parsing unit for parsing the UI description information to output the task-based UI. | 06-04-2009 |
Sungsoo Park, Seongnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090020760 | Methods for forming materials using micro-heaters and electronic devices including such materials - Nano-sized materials and/or polysilicon are formed using heat generated from a micro-heater, the micro-heater may include a substrate, a heating element unit formed on the substrate, and a support structure formed between the substrate and the heating element unit. Two or more of the heating element units may be connected in series. | 01-22-2009 |
| 20120205650 | METHODS FOR FORMING MATERIALS USING MICRO-HEATERS AND ELECTRONIC DEVICES INCLUDING SUCH MATERIALS - Nano-sized materials and/or polysilicon are formed using heat generated from a micro-heater, the micro-heater may include a substrate, a heating element unit formed on the substrate, and a support structure formed between the substrate and the heating element unit. Two or more of the heating element units may be connected in series. | 08-16-2012 |