Patent application number | Description | Published |
20110227208 | Structure and Manufacture Method For Multi-Row Lead Frame and Semiconductor Package - The present invention relates to structure and manufacture method for multi-row lead frame and semiconductor package, the method characterized by forming a pad portion on a metal material (first step); performing a surface plating process or organic material coating following the first pattern formation (second step); forming a second pattern on the metal material (third step); and packaging a semiconductor chip following the second pattern formation (fourth step), whereby an under-cut phenomenon is minimized by applying a gradual etching. | 09-22-2011 |
20120038036 | Structure for Multi-Row Leadframe and Semiconductor Package Thereof and Manufacture Method Thereof - The present invention relates to a multi-row leadframe for semiconductor packaging, characterized by: forming a plating pattern on a leadframe material (first step); forming a protective pattern on the plating pattern (second step); and forming a nano pattern by using the protective pattern as a mask (third step), whereby a protective pattern is formed on an upper surface of a plating pattern to increase reliability of a product by preventing damage to a plating layer caused by etching solution during pattern formation of leadframe and to thereby solve the problem of using the plating layer as an etching mask. | 02-16-2012 |
20140000947 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME | 01-02-2014 |
20140000951 | PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING SAME | 01-02-2014 |
20150076691 | SEMICONDUCTOR PACKAGE - Provided is a semiconductor package, including: a lower package to which elements are mounted; a metal post connected to the lower package and including at least one metal material portion; and an upper package to which elements is mounted, and which is connected to the metal post via a solder ball. | 03-19-2015 |
20150115426 | PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF AND SEMICONDUCTOR PACAKGE USING THE SAME - Provided are a printed circuit board which can be used as a substrate for a package, a method of manufacturing the printed circuit board, and a semiconductor package using the printed circuit board, the printed circuit board including: a first substrate having a first mounting area for mounting a package substrate and a second mounting area for mounting a semiconductor element; a single layer or multi-layered circuit pattern of the first substrate; and a post bump connected to the circuit pattern, provided on an external insulating layer of the first mounting area, and having a concave upper surface. | 04-30-2015 |
20150123281 | SEMICONDUCTOR PACKAGE SUBSTRATE, PACKAGE SYSTEM USING THE SAME AND METHOD FOR MANUFACTURING THEREOF - A semiconductor package substrate includes an insulating substrate; a circuit pattern on the insulating substrate; a protective layer on the insulating substrate, the protective layer covering the circuit pattern on the insulating substrate; a pad on the protective layer; and an adhesive member on the protective layer, wherein the pad includes a first pad buried in the protective layer, and a second pad on the first pad, the second pad protruding over the protective layer. | 05-07-2015 |
20150130060 | SEMICONDUCTOR PACKAGE SUBSTRATE, PACKAGE SYSTEM USING THE SAME AND METHOD FOR MANUFACTURING THEREOF - A semiconductor package substrate includes an insulating substrate, a circuit pattern on the insulating substrate, a protective layer formed on the insulating substrate to cover the circuit pattern on the insulating substrate, a pad formed on the protective layer while protruding from a surface of the protective layer, and an adhesive member on the pad. | 05-14-2015 |