Patent application number | Description | Published |
20100187494 | NITRIDE SEMICONDUCTOR-BASED LIGHT EMITTING DEVICES - A nitride semiconductor-based light emitting device is provided. The nitride semiconductor-based light emitting device is formed of a nitride semiconductor having a wurtzite lattice structure with the Ga face. The device has a substrate, a buffer layer, a first p-type contact layer, a second p-type contact layer, a first hole diffusion layer, a second hole diffusion layer, a light emitting active region, a second electron diffusion layer, a first electron a first n-type contact layer, which are sequentially stacked. Such a structure may effectively employ quasi-two-dimensional free electron and free hole gases formed at heterojunction interfaces due to the spontaneous polarization and the piezoelectric polarization in the wurtzite lattice structure with the Ga face, and thus enhances the emission uniformity and emission efficiency of the light emitting device. | 07-29-2010 |
20100240162 | MANUFACTURING METHOD OF LIGHT EMITTING DIODE INCLUDING CURRENT SPREADING LAYER - Provided is a method of manufacturing a light emitting diode using a nitride semiconductor, which including the steps of: forming n- and p-type current spreading layers using a hetero-junction structure; forming trenches by dry-etching the n- and p-type current spreading layers; forming an n-type metal electrode layer in the trench of the n-type current spreading layer; forming a p-type metal electrode layer in the trench of the p-type current spreading layer; and forming a transparent electrode layer on the p-type metal electrode layer, thereby improving current spreading characteristics as compared with the conventional method of manufacturing the light emitting diode, and enhancing operating characteristics of the light emitting diode. | 09-23-2010 |
20100319777 | SOLAR CELL AND METHOD OF FABRICATING THE SAME - A solar cell and method of fabricating the same are provided. The solar cell includes a metal electrode layer, an optical absorption layer, a buffer layer, and a transparent electrode layer. The metal electrode layer is disposed on a substrate. The optical absorption layer is disposed on the metal electrode layer. The buffer layer is disposed on the optical absorption layer and includes an indium gallium nitride (In | 12-23-2010 |
20110017289 | CIGS SOLAR CELL AND METHOD OF FABRICATING THE SAME - Provided are a CIGS solar cell and a method of fabricating the CIGS solar cell. In the method, a buffer layer exposing protrusions is formed. Then, a window electrode layer having an uneven surface conforming with the protrusions of the buffer layer is formed. Thus, an additional process for making the upper surface of a window electrode layer rough is unnecessary in order to decrease surface reflectance of incident sunlight and increase the solar cell efficiency, so that productivity can be improved. | 01-27-2011 |
20120248404 | GALLIUM-NITRIDE LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF - The present disclosure relates to a gallium-nitride light emitting diode and a manufacturing method thereof and the gallium-nitride light emitting diode includes an n-type nitride semiconductor layer formed on a substrate; an active layer formed on the n-type nitride semiconductor layer; a p-type doped intermediate layer formed on the active layer; and a p-type nitride semiconductor layer formed on the intermediate layer. | 10-04-2012 |
20120292634 | GALIUM-NITRIDE LIGHT EMITTING DEVICE OF MICROARRAY TYPE STRUCTURE AND MANUFACTURING THEREOF - Disclosed are a microarray type nitride light emitting device and a method of manufacturing the same. More particularly, a uniform current distribution property is ensured by dividing a fine light emitting region by using a first transparent contact layer according to a resistance change property in heat treatment of a material of a transparent conducting oxide used as a transparent contact layer, and connecting the divided light emitting regions by using a second transparent contact layer. | 11-22-2012 |
20130020649 | NITRIDE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen. | 01-24-2013 |
20130069127 | FIELD EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF - A method for fabricating a field effect transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a cap layer, an ohmic metal layer and an insulating layer on a substrate; forming multilayered photoresists on the insulating layer; patterning the multilayered photoresists to form a photoresist pattern including a first opening for gate electrode and a second opening for field electrode; etching the insulating layer by using the photoresist pattern as an etching mask so that the insulating layer in the first opening is etched more deeply and the cap layer is exposed through the first opening; etching the cap layer exposed by etching the insulating layer through the first opening to form a gate recess region; and depositing a metal on the gate recess region and the etched insulating layer to form a gate-field electrode layer. | 03-21-2013 |
20130069173 | POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; | 03-21-2013 |
20130087763 | LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - The inventive concept provides light emitting diodes and methods of manufacturing the same. The light emitting diode may include a first electrode layer, a light emitting layer on the first electrode layer, a second electrode layer on the light emitting layer, and a buffer layer formed on the second electrode layer, the buffer layer having concave-convex patterns increasing extraction efficiency of light generated from the light emitting layer. | 04-11-2013 |
20130187197 | HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF - Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film. | 07-25-2013 |
20140167070 | ELECTRONIC CHIP AND METHOD OF FABRICATING THE SAME - Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer. | 06-19-2014 |
20140179088 | METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - The inventive concept provides methods for manufacturing a semiconductor substrate. The method may include forming a stop pattern surrounding an edge of a substrate, forming a transition layer an entire top surface of the substrate except the stop pattern, and forming an epitaxial semiconductor layer on the transition layer and the stop pattern. The epitaxial semiconductor layer may not be grown from the stop pattern. That is, the epitaxial semiconductor layer may be isotropically grown from a top surface and a sidewall of the transition layer by a selective isotropic growth method, so that the epitaxial semiconductor layer may gradually cover the stop pattern. | 06-26-2014 |
20140213045 | NITRIDE ELECTRONIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen. | 07-31-2014 |
20140363937 | POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode. | 12-11-2014 |
20150087142 | HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF - Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film. | 03-26-2015 |