Patent application number | Description | Published |
20080224092 | Etchant for metal - An etchant for a metal is described. In one example, the etchant includes ammonium persulfate ((NH | 09-18-2008 |
20090170037 | COMPOSITION FOR REMOVING PHOTORESIST AND METHOD OF MANUFACTURING AN ARRAY SUBSTRATE USING THE SAME - A composition for removing a photoresist includes a) an amine compound having a cyclic amine and/or a diamine, b) a glycol ether compound, c) a corrosion inhibitor and d) a polar solvent. The composition further includes a stripping promoter. Further disclosed is a method of manufacturing an array substrate using the composition for removing a photoresist. | 07-02-2009 |
20100051934 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME - A thin film transistor array panel and a method of manufacturing the same are provided according to one or more embodiments. In an embodiment, a method includes: forming a gate line on an insulation substrate; stacking a gate insulating layer, an oxide semiconductor layer, a first barrier layer, and a first copper layer on the gate line; performing a photolithography process on the oxide semiconductor layer, the first barrier layer, and the first copper layer and forming a data line including a source electrode, a drain electrode, and an oxide semiconductor pattern; forming a passivation layer having the contact hole that exposes the drain electrode on the data line and the drain electrode; and forming a pixel electrode that is connected to the drain electrode through the contact hole on the passivation layer, wherein the forming of a data line, a drain electrode, and an oxide semiconductor pattern includes wet etching the first copper layer and then wet etching the first barrier layer and the oxide semiconductor layer. | 03-04-2010 |
20100120209 | ETCHANT COMPOSITION, AND METHOD OF FABRICATING METAL PATTERN AND THIN FILM TRANSISTOR ARRAY PANEL USING THE SAME - An etchant composition is provided. The etchant composition includes about 40 to about 65 wt % of phosphoric acid, about 2 to about 5 wt % of nitric acid, about 2 to about 20 wt % of acetic acid, about 0.1 to about 2 wt % of a compound containing phosphate, about 0.1 to about 2 wt % of a compound simultaneously containing an amino group and a carboxyl group, and a remaining weight percent of water for the total weight of the composition. | 05-13-2010 |
20100149476 | DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate. | 06-17-2010 |
20100149481 | MANUFACTURING METHOD OF MOLD AND METHOD FOR FORMING LIQUID CRYSTAL DISPLAY USING THE SAME - The present invention relates to a liquid crystal display (LDC) and in particular, a method of manufacturing a mold to be used in LCDs. The method includes the following steps: forming a first photosensitive film on a substrate; etching the substrate by using the first photosensitive film as a mask to form a first groove; removing the first photosensitive film; forming a second photosensitive film covering the first groove on the substrate; and etching the substrate by using the second photosensitive film as a mask to form a second groove. The method, according to embodiments of the invention, helps reduce the time and/or cost of manufacturing a liquid crystal display. | 06-17-2010 |
20100151610 | COMPOSITION FOR PHOTORESIST STRIPPER AND METHOD OF FABRICATING THIN FILM TRANSISTOR ARRAY SUBSTRATE - A composition for a photoresist stripper and a method of fabricating a thin film transistor array substrate are provided according to one or more embodiments. In one or more embodiments, the composition includes about 5-30 weight % of a chain amine compound, about 0.5-10 weight % of a cyclic amine compound, about 10-80 weight % of a glycol ether compound, about 5-30 weight % of distilled water, and about 0.1-5 weight % of a corrosion inhibitor. | 06-17-2010 |
20100155730 | THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF - In the manufacturing process of the thin film transistor array panel according to an exemplary embodiment of the present invention using three masks, the metal oxide semiconductor or the transparent conductive oxide is used, thereby executing an efficient lift-off process. | 06-24-2010 |
20100159400 | COMPOSITION FOR REMOVING A PHOTORESIST PATTERN AND METHOD OF FORMING A METAL PATTERN USING THE COMPOSITION - A composition for removing a photoresist pattern includes about 5 percent by weight to about 20 percent by weight of an aminoethoxy ethanol, about 2 percent by weight to about 10 percent by weight of a polyalkylene oxide, about 10 percent by weight to about 30 percent by weight of a glycol ether compound, and a remainder of an aprotic polar solvent including a nitrogen. Thus, the photoresist pattern can be easily removed from a substrate, thereby improving the removing ability of the composition. In addition, a residual amount of the photoresist pattern may be minimized, thereby improving the reliability of removing the photoresist pattern. | 06-24-2010 |
20100270554 | METHOD OF REFORMING A METAL PATTERN, ARRAY SUBSTRATE, AND METHOD OF MANUFACTURING THE ARRAY SUBSTRATE - A method of reforming a metal pattern for improving the productivity and reliability of a manufacturing process, an array substrate and a method of manufacturing the array substrate are disclosed. In the method, a first wiring pattern is formed on an insulation substrate. The first wiring pattern is removed. A second wiring pattern is formed on an embossed pattern by using the embossed pattern as an alignment mask. The embossed pattern is defined by a recess formed on a surface of the insulation substrate. Accordingly, the insulation substrate having the recess formed thereon may not be discarded, and may be reused in forming the first wiring pattern. In addition, the embossed pattern defined by the recess is used as an alignment mask, so that the alignment reliability of a metal pattern may be improved. | 10-28-2010 |
20100291722 | ETCHANT AND METHOD OF MANUFACTURING AN ARRAY SUBSTRATE USING THE SAME - An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH | 11-18-2010 |
20110133193 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 06-09-2011 |
20110226727 | ETCHANT FOR METAL WIRING AND METHOD FOR MANUFACTURING METAL WIRING USING THE SAME - Exemplary embodiments of the present invention provide a metal wiring etchant. A metal wiring etchant according to an exemplary embodiment of the present invention includes ammonium persulfate, an organic acid, an ammonium salt, a fluorine-containing compound, a glycol-based compound, and an azole-based compound. | 09-22-2011 |
20120135555 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel, including: sequentially forming a first silicon layer, a second silicon layer, a lower metal layer, and an upper metal layer on a gate insulating layer and a gate line; forming a first film pattern on the upper metal layer; forming a first lower metal pattern and a first upper metal pattern that includes a protrusion, by etching the upper metal layer and the lower metal layer; forming first and second silicon patterns by etching the first and second silicon layers; forming a second film pattern by ashing the first film pattern; forming a second upper metal pattern by etching the first upper metal pattern; forming a data line and a thin film transistor by etching the first lower metal pattern and the first and second silicon patterns; and forming a passivation layer and a pixel electrode on the resultant. | 05-31-2012 |
20120295380 | ETCHANT AND METHOD OF MANUFACTURING AN ARRAY SUBSTRATE USING THE SAME - An etchant includes about 0.1 percent by weight to about 30 percent by weight of ammonium persulfate (NH | 11-22-2012 |
20150053984 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 02-26-2015 |