| Patent application number | Description | Published |
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| 20100001761 | Multi-function input terminal of integrated circuits - A single terminal is used to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is coupled by a low impedance to a voltage source, or 2) is coupled by a medium impedance to the voltage source, or 3) is floating or substantially floating. The circuit asserts a first digital logic signal when the circuit determines that the terminal is coupled by the low impedance to the voltage source. The circuit asserts a second digital logic signal when the circuit determines that the terminal is coupled by the medium impedance to the voltage source. The circuit asserts a third digital logic signal when the circuit determines that the terminal is floating or substantially floating. The terminal and circuit are particular suited for use in a Power Management Unit (PMU) Integrated Circuit. | 01-07-2010 |
| 20100156368 | Power converters with switched capacitor buck/boost - A power converter having a switched capacitor buck/boost operation has first and second switches coupled to a first switching node, third and fourth switches coupled to a second switching node, a capacitor coupled between the first and second switching nodes, and an inductor coupled to the first switching node. A switch controller controls the switches to operate in voltage step-down mode and voltage step-up mode depending on a difference between converter output voltage VOUT and converter input voltage VIN. In a buck-optimized topology operating in a step-down mode, an output current flowing through the first switching node flows through only one switch at a given time. In a boost-optimized topology operating in a step-up mode, an output current flowing through the first switching node flows through only one switch at a given time. As a result, a more compact and efficient power converter may be realized at lower cost. | 06-24-2010 |
| 20100199246 | Programmable analog tile configuration tool - A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements. | 08-05-2010 |
| 20100199247 | Communicating configuration information across a programmable analog tile to another tile - A programmable analog tile integrated circuit is configured over a standardized bus by communicating tile configuration information from a first integrated circuit tile, through a second integrated circuit tile, to a third integrated circuit tile. Each of the three integrated circuit tiles is part of an integrated circuit. The standardized bus is formed when the tiles are placed adjacent one another. Data bus and control signal conductors of the adjacent tiles line up and interconnect such that each signal conductor is electrically connected to every tile. Tile configuration information may be written to a selected register identified by an address in any selected one of the tiles using the data bus and control lines, regardless of the relative physical locations of the tile sending and the tile receiving the information. Thus, tile configuration information may pass from one tile to another tile, through any number of intermediate tiles. | 08-05-2010 |
| 20100199249 | Programmable analog tile placement tool - A programmable analog tile integrated circuit placement tool allows a user to manipulate a graphical representation of a first power management integrated circuit (PMIC) tile with respect to a graphical representation of a second PMIC tile in a proposed Multi-Tile Power Management Integrated Circuit (MTPMIC). The novel PMIC tiles have pre-defined physical structures including a bus portion and a memory structure for storing configuration information for configuring the tile. When appropriately placed in a MTPMIC, the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. A remote user with minimal training in analog circuit design may command the placement of individual tiles in a proposed MTPMIC layout. Upon receiving a user response indicating satisfaction with the placement of PMIC tiles, the tool quickly and automatically generates physical layout data suitable for fabrication of the MTPMIC. | 08-05-2010 |
| 20100199250 | Analog tile selection, placement, configuration and programming tool - An Analog Tile Selection, Placement, Configuration and Programming (ATSPCP) tool communicates a power management characteristic query over a network. The query is displayed to a user on a webpage. The query is a solicitation for desired characteristics of a Power Management Integrated Circuit (PMIC). After receiving user requirements in a response to the query, the tool selects a number of power management integrated circuit tiles having pre-defined physical structures. The pre-defined structure of each tile includes a bus portion and a memory structure for storing configuring information for the tile. When combined in a Multi-Tile Power Management Integrated Circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC that meets the user requirements. The ATSPCP tool combines the physical layout data of each selected PMIC tile to form composite physical layout data for the overall MTPMIC. | 08-05-2010 |
| 20100199254 | Programmable analog tile programming tool - A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements. | 08-05-2010 |
| 20110157924 | Using output drop detection pulses to achieve fast transient response from a low-power mode - In a first aspect, in a Primary Side Regulation (PSR) power supply, some primary current pulses are used to forward bias an output diode such that an auxiliary winding voltage can be properly sampled after each pulse. The samples are used to regulate the power supply output voltage (VOUT). Other primary current pulses, however, are of a smaller peak amplitude. These pulses are not used for VOUT regulation, but rather are used to determine whether the VOUT has dropped. In a second aspect, a transient current detector circuit within the PSR controller integrated circuit detects whether an optocoupler current has dropped in a predetermined way. If the TRS current detector detects that the optocoupler current has dropped, then the power supply stops operating in a sleep mode and is made to operate in another higher power operating mode in which the power supply switches. | 06-30-2011 |
| 20110157936 | Using output drop detection pulses to achieve fast transient response from a low-power mode - In a first aspect, in a Primary Side Regulation (PSR) power supply, some primary current pulses are used to forward bias an output diode such that an auxiliary winding voltage can be properly sampled after each pulse. The samples are used to regulate the power supply output voltage (VOUT). Other primary current pulses, however, are of a smaller peak amplitude. These pulses are not used for VOUT regulation, but rather are used to determine whether the VOUT has dropped. In a second aspect, a transient current detector circuit within the PSR controller integrated circuit detects whether an optocoupler current has dropped in a predetermined way. If the TRS current detector detects that the optocoupler current has dropped, then the power supply stops operating in a sleep mode and is made to operate in another higher power operating mode in which the power supply switches. | 06-30-2011 |
| Patent application number | Description | Published |
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| 20090058387 | Maintaining a constant output voltage by sampling and holding a voltage across an auxiliary winding - A lower-cost and more precise control methodology of regulating the output voltage of a flyback converter from the primary side is provided, which works accurately in either continuous voltage mode (CCM) and discontinuous mode (DCM), and can be applied to most small, medium and high power applications such cell phone chargers, power management in desktop computers and networking equipment, and, generally, to a wide spectrum of power management applications. Two highly integrated semiconductor chips based on this control methodology are also described that require very few components to build a constant voltage flyback converter. | 03-05-2009 |
| 20090073727 | Adjusting for conductor loss to regulate constant output voltage in a primary feedback converter - A lower-cost and more precise control methodology of regulating the output voltage of a flyback converter from the primary side is provided, which works accurately in either continuous voltage mode (CCM) and discontinuous mode (DCM), and can be applied to most small, medium and high power applications such cell phone chargers, power management in desktop computers and networking equipment, and, generally, to a wide spectrum of power management applications. Two highly integrated semiconductor chips based on this control methodology are also described that require very few components to build a constant voltage flyback converter. | 03-19-2009 |
| 20100061126 | System and method for a primary feedback switched mode power supply - A primary side controlled power converter having a voltage sensing means coupled to a transformer of the power converter and configured to provide a voltage feedback waveform representative of an output of the transformer is provided. A primary switching circuit operates to control energy storage of a primary side of the transformer. The primary switching circuit is operable during an on time and inoperable during an off time. The on and off time is switched at a system frequency. A feedback amplifier generates an error signal indicative of a difference between the voltage feedback waveform and a reference voltage. A sample and hold circuit samples the error signal at a periodic frequency during the off time. An error signal amplifier is configured to provide the sampled value to the primary switching circuit wherein the primary switching circuit controls the transformer and thereby regulates an output of the power converter. | 03-11-2010 |
| 20100066332 | Switching power supply with near zero supply current in light-load operation - Techniques for near zero light-load supply current in switching power supply are described. In one embodiment, a switching power supply comprises sub-circuits, a capacitor/inverter circuit, and a standby control circuit. The sub-circuits comprise a feedback resistor that supplies a fraction of an output voltage of the power supply, an integrator that provides an integrator output, a comparator that provides a pulse width modulated signal, a switching element that receives the pulse width modulated signal and modulates current such that the power supply provides a regulated voltage, and a monitoring circuit that provides a logic low signal when the pulse width modulated signal is absent over a period of time. The standby control circuit disables the sub-circuits when the logical low signal is detected permitting the switching power supply to operate at a minimum current, an re-enables the sub-circuits when an out of regulation signal from the capacitor/inverter circuit is detected. | 03-18-2010 |
