Patent application number | Description | Published |
20130318268 | OFFLOADING OF COMPUTATION FOR RACK LEVEL SERVERS AND CORRESPONDING METHODS AND SYSTEMS - A distributed server system for handling multiple networked applications is disclosed. Systems can include at least one main processor; a plurality of offload processors connected to a memory bus; an arbiter connected to each of the plurality of offload processors, the arbiter configured to schedule resource priority for instructions or data received from the memory bus; and a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus, and further directing at least some memory read/write data to the arbiter. | 11-28-2013 |
20130318269 | PROCESSING STRUCTURED AND UNSTRUCTURED DATA USING OFFLOAD PROCESSORS - Methods of processing structured data are disclosed that can include providing a plurality of XIMM modules connected to a memory bus in a first server, with the XIMM modules each respectively having a DMA slave module connected to the memory bus and an arbiter for scheduling tasks, with the XIMM modules further providing an in-memory database; and connecting a central processing unit (CPU) in the first server to the XIMM modules by the memory bus, with the CPU arranged to process and direct structured queries to the plurality of XIMM modules. | 11-28-2013 |
20130318277 | PROCESSING STRUCTURED AND UNSTRUCTURED DATA USING OFFLOAD PROCESSORS - A structured data processing system is disclosed that can include a plurality of XIMM modules connected to a memory bus in a first server, with the XIMM modules each respectively having a DMA slave module connected to the memory bus and an arbiter for scheduling tasks, with the XIMM modules providing an in-memory database; and a central processing unit (CPU) in the first server connected to the XIMM modules by the memory bus, with the CPU arranged to process and direct structured queries to the plurality of XIMM modules. | 11-28-2013 |
20130318280 | OFFLOADING OF COMPUTATION FOR RACK LEVEL SERVERS AND CORRESPONDING METHODS AND SYSTEMS - Methods for handling multiple networked applications using a distributed server system are disclosed. Methods can include providing at least one main processor and a plurality of offload processors connected to a memory bus; providing an arbiter connected to each of the plurality of offload processors, the arbiter capable of scheduling resource priority for instructions or data received from the memory bus; and operating a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus; and directing at least some memory read/write data to the arbiter from the virtual switch. | 11-28-2013 |
20140157397 | EFFICIENT PACKET HANDLING, REDIRECTION, AND INSPECTION USING OFFLOAD PROCESSORS - A packet handling system is disclosed that can include at least one main processor, a plurality of offload processors connected to a memory bus and configured to provide security related services on packets prior to redirection to the main processor; an arbiter connected to each of the plurality of offload processors, the arbiter capable of scheduling resource priority for instructions or data received from the memory bus; and a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus, and further directing at least some memory read/write data to the arbiter. | 06-05-2014 |
20140165196 | EFFICIENT PACKET HANDLING, REDIRECTION, AND INSPECTION USING OFFLOAD PROCESSORS - Method for handling packets are disclosed that can include providing at least one main processor connected to a plurality of offload processors by a memory bus; providing an arbiter connected to each of the plurality of offload processors, the arbiter capable of scheduling resource priority for instructions or data received from the memory bus; configuring the offload processors to provide security related services on packets prior to redirection to the main processor; operating a virtual switch respectively connected to the main processor and the plurality of offload processors using the memory bus, with the virtual switch capable of receiving memory read/write data over the memory bus; and directing at least some memory read/write data to the arbiter from the virtual switch. | 06-12-2014 |
20140198652 | Scheduling and Traffic Management with Offload Processors - A scheduling system for a packet processing system is disclosed. The system can include a classification circuit connected to a memory bus and configurable to classify network packets, placing the classified network packets into first multiple input/output queues, a scheduling circuit for reordering the network packets received from the classification circuit through the first multiple input/output queues and placing the reordered network packets into second multiple input/output queues, an arbitration circuit for directing network packets received from the scheduling circuit through the second multiple input/output queues to multiple output ports, and multiple offload processors, each coupled to at least one of the multiple output ports, the offload processors configured to modify the network packets. | 07-17-2014 |
20140198653 | Scheduling and Traffic Management with Offload Processors - A method for scheduling packet processing is disclosed. The method can include classifying network packets based on session metadata and placing the classified network packets into first multiple input/output queues, with network packets transported to a classification circuit using a memory bus having a defined memory transport protocol, reordering network packets received from the first multiple input/output queues using a scheduling circuit and placing the reordered network packets into a second multiple input/output queues, directing network packets received from the scheduling circuit through the second multiple input/output queues to multiple output ports using an arbitration circuit, and modifying network packets using multiple offload processors, each offload processor coupled to at least one of the multiple output ports, the offload processors configured to direct modified network packets back to the memory bus. | 07-17-2014 |
20140198799 | Scheduling and Traffic Management with Offload Processors - A method for providing scheduling services for network packet processing using a memory bus connected module is disclosed. The method can include transferring network packets to the module through a memory bus connection, reordering network packets received from the memory bus connection with a scheduling circuit and placing the reordered network packets into multiple input/output queues, and modifying reordered network packets placed into multiple input/output queues using multiple offload processors connected to the memory bus. | 07-17-2014 |
20140198803 | Scheduling and Traffic Management with Offload Processors - A memory bus connected module for scheduling services for network packet processing is disclosed. The module can include a memory bus connection, a scheduling circuit configured to reorder network packets received from the memory bus connection and place the reordered network packets into multiple input/output queues, and multiple offload processors connected to the memory bus connection, each offload processor configured to modify network packets in the multiple input/output queues. | 07-17-2014 |
20140201303 | Network Overlay System and Method Using Offload Processors - An input-output (IO) virtualization system connectable to a network is disclosed. The system can include a second virtual switch connected to a memory bus and configured to receive network packets from a first virtual switch, and an offload processor module supporting the second virtual switch, the offload processor module further comprising at least one offload processor configured to modify network packets and direct the modified network packets to the first virtual switch through the memory bus. | 07-17-2014 |
20140201304 | Network Overlay System and Method Using Offload Processors - A method for processing data is disclosed. The method can include transporting data to a second virtual switch from a first virtual switch using a memory bus having a defined memory transport protocol, writing the transported data to a target memory location, and processing the data written to the target memory location with at least one offload processor included on an offload processor module. | 07-17-2014 |
20140201305 | Network Overlay System and Method Using Offload Processors - A memory bus connected module, connectable to a first virtual switch for providing input-output (IO) virtualization services is disclosed. The module can include a second virtual switch coupled to the first virtual switch via a memory bus connection, a plurality of offload processors coupled to the memory bus connection, and at least one memory unit connected to, and separately addressable by, the multiple offload processors, and configured to receive data directed to a specific memory address space for processing by at least one of the offload processors. | 07-17-2014 |
20140201309 | Network Overlay System and Method Using Offload Processors - A method for providing network overlay services capable of processing network packets having associated packet metadata is disclosed. The method can include writing packets to a specific memory location accessible by at least one offload processor, with packets transported using a memory bus having a defined memory transport protocol, modifying packet metadata of the packets written to the specific memory location with the at least one offload processor, without requiring modification of the packets by a host processor, and sending the modified packets to the memory bus. | 07-17-2014 |
20140201310 | Network Overlay System and Method Using Offload Processors - A memory bus connected module for providing network overlay services is disclosed. The module comprising can include a memory bus connection, multiple offload processors coupled to the memory bus connection, each offload processor configured to convert incoming packets having a first network protocol to outgoing packets having a second network protocol, and control logic connected to the multiple offload processors for determining order of packet conversion by respective task execution of the multiple offload processors. | 07-17-2014 |
20140201390 | Network Overlay System and Method Using Offload Processors - A network overlay system capable of processing network packets having metadata is disclosed. The system can include a data transport module configurable to direct network packets based on network identifier tags, an offload processor module connected to a memory bus and including at least one offload processor capable of modifying segregated network packets, and a memory bus connected between the data transport module and the at least one offload processor to support transport of network packets to the offload processor for modification. | 07-17-2014 |
20140201402 | Context Switching with Offload Processors - A memory bus connected module with context switching capability is described. The module can include a memory bus connection compatible with a memory bus socket, a plurality of offload processors attached to the module and connected to a memory bus, with each offload processor having a cache with an associated cache state, a context memory attached to the module and connected to the offload processors, and a scheduling circuit configured to direct a transfer of a cache state between at least one of the offload processors and the context memory. | 07-17-2014 |
20140201404 | OFFLOAD PROCESSOR MODULES FOR CONNECTION TO SYSTEM MEMORY, AND CORRESPONDING METHODS AND SYSTEMS - A system can include at least one offload processor having a data cache, the offload processor including a slave interface configured to receive write data and provide read data over a memory bus; an offload processor module including context memory and a bus controller connected to the slave interface; and logic coupled to the offload processor and context memory and configured to detect predetermined write operations over the memory bus; wherein the offload processor is configured to execute operations on data received over the memory bus, and to output context data to the context memory, and read context data from the context memory. | 07-17-2014 |
20140201408 | OFFLOAD PROCESSOR MODULES FOR CONNECTION TO SYSTEM MEMORY, AND CORRESPONDING METHODS AND SYSTEMS - A system can include at least one processor module, including an in-line module connector configured to physically connect the processor module to at least one in-line memory slot of a system memory bus; at least one memory; at least one offload processor mounted on the module, and configured to execute operations on data received over the system memory bus, and to output context data to the memory, and read context data from the memory; and hardware scheduling logic including an arbiter that arbitrates between conflicting data access requirements within the processor module, and a scheduler to order computing tasks, both arbiter and scheduler being mounted on the module and configured to control operations of the at least one processor. | 07-17-2014 |
20140201409 | OFFLOAD PROCESSOR MODULES FOR CONNECTION TO SYSTEM MEMORY, AND CORRESPONDING METHODS AND SYSTEMS - A processor module can include an in-line module connector configured to physically connect to an in-line memory slot of a system memory bus; a data interface configured to receive write data from the system memory bus, via the in-line module connector, and according to a predetermined protocol; and at least one offload processor configured to process the write data according to instruction data within the write data; and wherein hardware scheduling logic mounted in the processor module include an arbiter that arbitrates between conflicting data access requirements within the processor module, and a scheduler to order computing tasks, both arbiter and scheduler being mounted on the in-line module and configured to control operations of the at least one offload processor. | 07-17-2014 |
20140201416 | OFFLOAD PROCESSOR MODULES FOR CONNECTION TO SYSTEM MEMORY, AND CORRESPONDING METHODS AND SYSTEMS - A method can include receiving write data over a system memory bus via an in-line module connector, the write data including a metadata portion identifying a processing to be performed on at least a portion of the write data; performing the processing on at least a portion of the write data with at least one offload processor mounted on a module having the in-line module connector to generate processed data; and transmitting the processed data over the system memory bus; wherein the system memory bus is further connected to at least one processor connector configured to receive at least one host processor different from the at least one offload processor. | 07-17-2014 |
20140201417 | OFFLOAD PROCESSOR MODULES FOR CONNECTION TO SYSTEM MEMORY, AND CORRESPONDING METHODS AND SYSTEMS - A system can include a host processor connected to memory via a system memory bus; and at least one offload processor module, including at least one offload processor mounted on the offload processor module, and configured to execute operations on data received over the system memory bus, and to output context data to memory, and read context data from the memory, and hardware scheduling logic mounted on the module and configured to control operations of the at least one offload processor. | 07-17-2014 |
20140201453 | Context Switching with Offload Processors - A context switching cache system is disclosed. The system can include a plurality of offload processors connected to a memory bus, each offload processor having a cache with an associated cache state, a context memory coupled to the offload processors, and a scheduling circuit configured to direct transfer of a cache state between at least one of the offload processors and the context memory. | 07-17-2014 |
20140201461 | Context Switching with Offload Processors - A method for context switching of multiple offload processors coupled to receive data for processing over a memory bus is disclosed. The method can include directing storage of a cache state, via a bulk read from a cache of at least one of a plurality of offload processors into a context memory, by operation of a scheduling circuit, with any virtual and physical memory locations of the cache state being aligned, and subsequently directing transfer of the cache state to at least one of the offload processors for processing, by operation of the scheduling circuit. | 07-17-2014 |
20140201761 | Context Switching with Offload Processors - A method for context switching of multiple offload processors is disclosed. The method can include receiving network packets for processing through a memory bus connected socket, organizing the network packets into multiple sessions for processing, suspending processing of at least one session by reading a cache state of at least one of the offload processor into a context memory by operation of a scheduling circuit, with virtual memory locations and physical cache locations being aligned, and subsequently directing transfer of the cache state to at least one of the offload processors for processing by operation of the scheduling circuit. | 07-17-2014 |
Patent application number | Description | Published |
20080240912 | METHOD AND APPARATUS FOR ASSEMBLING TURBINE ENGINES - A method of assembling a stator assembly includes coupling at least one stator ring segment to a portion of a casing using at least one circumferential stator ring groove defined in the casing. The method also includes coupling at least one stator blade assembly to a portion of the stator ring segment such that at least one radial passage is at least partially defined by at least one of the stator blade assembly and the stator ring segment. The stator assembly includes at least one first radial passage defined within a portion of the stator ring segment. The assembly also includes at least one second radial passage coupled in flow communication with the first radial passage. The second radial passage is at least partially adjacent to at least one of a portion of the stator blade assembly and a portion of the stator ring segment. | 10-02-2008 |
20090077795 | Replaceable Staking Insert - A rotating assembly. The rotating assembly may include a wheel, a slot positioned about the wheel with the slot having a staking recess positioned therein, a wheel attachment positioned within the slot, and a staking insert positioned within the staking recess. The staking recess axially retains the staking insert and the wheel attachment radially retains the staking insert. | 03-26-2009 |
20100028146 | METHOD AND APPARATUS FOR ASSEMBLING GAS TURBINE ENGINES - A method of operating a gas turbine engine includes forming at least one stator ring passage within at least a portion of a radially inner surface of a casing. The method also includes providing at least one stator ring segment that is sized to be inserted into the at least one stator ring passage. The method further includes forming at least one radial passage within at least a portion of the at least one stator ring segment such that at least a portion of the at least one radial passage is adjacent to at least one substantially axial stator blade passage. | 02-04-2010 |
20100068049 | FEATURES TO PROPERLY ORIENT INLET GUIDE VANES - Several physical features on an inlet guide vane (IGV) ensure proper orientation of the IGV within a compressor during assembly. A gear with several teeth removed results in a flat surface on the gear which inhibits the gear from rotating on the rack of the compressor inlet casing. An orientation pin is located in the internal bore of the gear. The cylindrical IGV spindle has a portion formed as a flat surface and the orientation pin engages this flat surface. These features are applicable to both a one-piece IGV where the jackshaft is integrated with the IGV stem and a two-piece IGV in which the jackshaft is separate from the IGV stem. A feature applicable to a two-piece IGV is a shaped boss on the IGV stem that allows the jackshaft to be located on the IGV stem in only one orientation. | 03-18-2010 |
20110014053 | TURBINE BUCKET LOCKWIRE ROTATION PREVENTION - A retention system for a plurality of turbine buckets located in respective mating slots in a turbine rotor wheel includes a plurality of first retention slots formed in outer peripheral portions of the turbine wheel, and a plurality of second retention slots formed in wheel mounting portions of the buckets. The first and second retention slots are aligned to form an annular retention slot extending about a peripheral portion of the rotor wheel. A lockwire is located within the annular retention slot, the lockwire having engaged free ends. A plurality of axially-oriented retaining pins are fixed in the rotor wheel to hold the lockwire in the annular retention slot, and various techniques are employed for at least limiting or substantially preventing circumferential rotation of the lockwire within the annular slot. | 01-20-2011 |
20110176913 | NON-LINEAR ASYMMETRIC VARIABLE GUIDE VANE SCHEDULE - A variable inlet guide vane arrangement for a compressor includes a case defining an inlet of the compressor; at least one vane support coaxially disposed within the case; a plurality of vanes circumferentially disposed around the circumference of the case, each vane being pivotally mounted between the case and the at least one vane support; an actuator mechanism configured to pivot at least some of the plurality of vanes in an asymmetrical pattern around the circumference of the case. A method of controlling a variable inlet guide vane arrangement for a compressor includes pivoting at least some of the plurality of vanes in an asymmetrical pattern around the circumference of the case. | 07-21-2011 |
20120121424 | TURBINE BLADE COMBINED DAMPER AND SEALING PIN AND RELATED METHOD - A damper pin for a turbine bucket includes an elongated main body portion having a first substantially uniform cross-sectional shape and axially-aligned, leading and trailing end portions having a second relatively smaller cross-sectional shape at opposite ends of the main body portion. A seal element is provided on one or both of the opposite leading and trailing end portions projecting radially outwardly beyond the main body portion. | 05-17-2012 |
20130318996 | COOLING ASSEMBLY FOR A BUCKET OF A TURBINE SYSTEM AND METHOD OF COOLING - A cooling assembly for a bucket of a turbine system includes a shroud assembly operably coupled to an outer casing of a turbine section. Also included is an airfoil having at least one cavity, wherein the at least one cavity is configured to receive a cooling flow from a cooling source through at least one channel disposed within the shroud assembly. | 12-05-2013 |
20140003909 | NON-LINEAR ASYMMETRIC VARIABLE GUIDE VANE SCHEDULE | 01-02-2014 |
20140123666 | System to Improve Gas Turbine Output and Hot Gas Path Component Life Utilizing Humid Air for Nozzle Over Cooling - A system to improve gas turbine output and extend the life of hot gas path components includes a subsystem for estimating an amount of water or steam to be added to the flow of air to achieve the desired hot gas path temperature. The system includes a water or steam injection component adapted to inject the amount of water or steam to the flow of air to generate a flow of humid air and an injection subsystem adapted to inject the flow of humid air into a nozzle at the turbine stage are also included. The system includes a temperature sensor disposed at a turbine stage, and a subsystem for determining a desired hot gas path temperature at the turbine stage. An extraction conduit is coupled to a compressor stage and is adapted to extract a flow of air. | 05-08-2014 |
20140154063 | AIRFOIL AND A METHOD FOR COOLING AN AIRFOIL PLATFORM - An airfoil includes an outer surface having a leading edge, a trailing edge downstream from the leading edge, and a convex surface between the leading and trailing edges. A cavity is inside the outer surface, and a platform is connected to the outer surface and defines a top surface around at least a portion of the outer surface. A first plurality of trenches is beneath the top surface of the platform upstream from the leading edge, wherein each trench in the first plurality of trenches is in fluid communication with the cavity inside the outer surface. A first plurality of cooling passages provide fluid communication from the first plurality of trenches through the top surface of the platform. | 06-05-2014 |
20150044059 | AIRFOIL FOR A TURBINE SYSTEM - An airfoil includes a main portion formed of a base material. Also included is a trailing edge region of the main portion. Further included is a trailing edge supplement structure comprising at least one pre-sintered preform (PSP) material operatively coupled to the base material proximate the trailing edge region. | 02-12-2015 |
20150184523 | STRUCTURAL CONFIGURATIONS AND COOLING CIRCUITS IN TURBINE BLADES - A turbine blade having an airfoil defined by a concave shaped pressure side outer wall and a convex shaped suction side outer wall that connect along leading and trailing edges and, therebetween, form a radially extending chamber for receiving the flow of a coolant. The turbine blade may include a rib configuration that partitions the chamber and defines a flow passage having a first and a second side. The flow passage may include a port formed through the first side. A projection of a center axis of the port through the flow passage may define a strike point on the second side of the flow passage, and a backstrike recess may be positioned on the second side of the flow passage so to contain the strike point. | 07-02-2015 |
20150198059 | GAS TURBINE MANUAL CLEANING AND PASSIVATION - A gas turbine engine may be manually cleaned by removing a compressor casing and a turbine casing from the gas turbine engine, cleaning stator vanes of the gas turbine engine, and applying an organic acid solution to metallic surfaces of the gas turbine engine. The organic acid solution may be rinsed from the gas turbine engine and an anticorrosive solution may be applied to the metallic surfaces of the gas turbine engine. | 07-16-2015 |
20150345296 | TURBINE BUCKET ASSEMBLY AND TURBINE SYSTEM - A turbine bucket assembly and turbine system are disclosed. The turbine bucket assembly includes a single-lobe joint having an integral platform, the joint having a first axial length; a segmented airfoil having a root segment extending radially outward from the platform and a tip segment coupled to the root segment, the tip segment having a second axial length, which is less than the first axial length; and a turbine wheel defining a receptacle with a geometry corresponding to the single-lobe joint and being coupled to the single-lobe joint. The tip segment includes a tip segment material, the root segment includes a root segment material, and the turbine wheel includes a turbine wheel material, the root segment material and the turbine wheel material having a lower heat resistance and a higher thermal expansion than the tip segment material. | 12-03-2015 |
20150345314 | TURBINE BUCKET ASSEMBLY AND TURBINE SYSTEM - A turbine bucket assembly and turbine system are disclosed. The turbine bucket assembly includes a single-lobe joint having an integral platform, the joint having a first axial length; a non-segmented airfoil having a root section and a tip section integral with the root section, the tip section having a tip end with a second axial length, the second axial length being less than the first axial length; and a turbine wheel having a receptacle with a geometry corresponding to the single-lobe joint and being coupled to the single-lobe joint. The turbine wheel includes a turbine wheel material and the single-lobe joint and the non-segmented airfoil include a turbine bucket material, the turbine bucket material having a higher heat resistance and a lower thermal expansion than the turbine wheel material. | 12-03-2015 |
20160061043 | TURBINE BUCKET - A turbine bucket includes a leading edge, a trailing edge, a root portion, and a tip portion. The turbine bucket also includes one or more cooling passages extending through a body of the turbine bucket from an inlet to an outlet. The cooling passages are configured to route a cooling flow of fluid through the turbine bucket. The turbine bucket further includes a plenum defined within the tip portion to receive the fluid from the outlet of the cooling passages for expulsion of the cooling flow of fluid into a main flow path via at least one outlet hole proximate the trailing edge of the turbine bucket. | 03-03-2016 |