Patent application number | Description | Published |
20080197487 | Semiconductor Device Including a Coupled Dielectric Layer and Metal Layer, Method of Fabrication Thereof, and Material for Coupling a Dielectric Layer and a Metal Layer in a Semiconductor Device - A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device. In one example, the passivating coupling material has multiple Si atoms in its chemical composition, which desirably increases the thermal stability of the material. | 08-21-2008 |
20080242110 | Capping Layer Formation Onto a Dual Damescene Interconnect - A process for the formation of a capping layer on a conducting interconnect for a semiconductor device is provided, the process comprising the steps of: (a) providing one or more conductors in a dielectric layer, and (b) depositing a capping layer on an upper surface of at least some of the one or more conductors, characterised in that the process further includes: (c) the step of, prior to depositing the capping layer, reacting the dielectric layer with an organic compound in a liquid phase, the said organic compound having the following general formula: (I) where X is a functional group, R is an organic group or a organosiloxane group, Y1 is either a functional group or an organic group or organosiloxane group, and Y2 is either a functional group or an organic group or organosiloxane group, and where the functional group(s) is/are independently selected from the following: NH2, a secondary amine, a tertiary amine, acetamide, trifluoroacetamide, imidazole, urea, OH, an alkyoxy, acryloxy, acetate, SH, an alkylthiol, sulfonate, methanosulfonate, and cyanide, and salts thereof. | 10-02-2008 |
20080287041 | System and Method for Removing Particles From a Polishing Pad - A system for removing particles from a polishing pad to improve the efficiency of the removal of material by the polishing pad as part of a chemical-mechanical polishing process, the system comprising a polishing pad; a fluid dispenser arranged to dispense a fluid on the polishing pad; and removal means, wherein the removal means include a heater for increasing the temperature of the fluid dispensed on the polishing pad, and/or voltage means for coupling the polishing pad to a voltage source for repelling charged particles from the polishing pad surface while the fluid dispenser is dispensing the fluid on the polishing pad. | 11-20-2008 |
20090115031 | SEMICONDUCTOR DEVICE INCLUDING A COUPLED DIELECTRIC LAYER AND METAL LAYER, METHOD OF FABRICATION THEREOF, AND PASSIVATING COUPLING MATERIAL COMPRISING MULTIPLE ORGANIC COMPONENTS FOR USE IN A SEMICONDUCTOR DEVICE - A material for passivating a dielectric layer in a semiconductor device has a molecular structure permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. The contemplated material may be constituted by multiple organic components. A semiconductor device including a layer of the passivating coupling material, and a method of manufacturing such a semiconductor device are also contemplated. | 05-07-2009 |
20090301867 | INTEGRATED SYSTEM FOR SEMICONDUCTOR SUBSTRATE PROCESSING USING LIQUID PHASE METAL DEPOSITION - A system for processing a semiconductor substrate during fabrication of semiconductor devices provides a plurality of semiconductor substrate processing stations in a physically integrated system, as well as a semiconductor substrate transport system for transporting a semiconductor substrate between the respective processing stations. In particular, the processing system according to the present invention favors the use of liquid phase process steps, particularly deposition process steps, instead of gas or vapor phase processing. Even more particularly, the system contemplates deposition of a metallic barrier layer | 12-10-2009 |
20100139526 | SEMICONDUCTOR DEVICE INCLUDING A COUPLED DIELECTRIC LAYER AND METAL LAYER, METHOD OF FABRICATION THEREOR, AND MATERIAL FOR COUPLING A DIELECTRIC LAYER AND A METAL LAYER IN A SEMICONDUCTOR DEVICE - A passivating coupling material for, on the one hand, passivating a dielectric layer in a semiconductor device, and on the other hand, for permitting or at least promoting liquid phase metal deposition thereon in a subsequent process step. In a particular example, the dielectric layer may be a porous material having a desirably decreased dielectric constant k, and the passivating coupling material provides steric shielding groups that substantially block the adsorption and uptake of ambient moisture into the porous dielectric layer. The passivating coupling materials also provides metal nucleation sides for promoting the deposition of a metal thereon in liquid phase, in comparison with metal deposition without the presence of the passivating coupling material. The use of a liquid phase metal deposition process facilitates the subsequent manufacture of the semiconductor device. In one example, the passivating coupling material has multiple Si atoms in its chemical composition, which desirably increases the thermal stability of the material. | 06-10-2010 |