Patent application number | Description | Published |
20120320119 | IMAGE RECORDING DEVICE AND METHOD OF IMAGE RECORDING - An image recording device which includes a control unit which alternately performs, main-scannings in which the recording head is moved in the main-scanning direction while the recording head ejecting the liquid to form line images that extend in the main scanning direction and are adjacent to each other in the sub-scanning direction, and sub-scannings in which the recording head is moved in the sub-scanning direction, and a detection unit which detects a displacement of a mark which is formed on the recording medium in the sub-scanning direction, wherein the control unit adjusts a movement amount of the recording head which is moved in the sub-scanning direction in the sub-scannings on the basis of a detection result of the detection unit. | 12-20-2012 |
20130021403 | IMAGE RECORDING APPARATUS, IMAGE RECORDING METHOD, PROGRAM, AND PROGRAM RECORDING MEDIUM - An image recording apparatus forms an image on a recording medium including a liquid accommodation layer by landing a liquid to the liquid accommodation layer of the recording medium. The image recording apparatus includes a first unit that performs pre-processing of landing the liquid containing a material with absorbability lower than that of the liquid accommodation layer to an edge of an image formation region at which the image is scheduled to be formed; and a second unit that forms the image at the image formation region of the recording medium after the first unit performs the pre-processing. | 01-24-2013 |
20140146104 | IMAGE RECORDING DEVICE AND METHOD OF IMAGE RECORDING - An image recording device which includes a control unit which alternately performs, main-scannings in which the recording head is moved in the main-scanning direction while the recording head ejecting the liquid to form line images that extend in the main scanning direction and are adjacent to each other in the sub-scanning direction, and sub-scannings in which the recording head is moved in the sub-scanning direction, and a detection unit which detects a displacement of a mark which is formed on the recording medium in the sub-scanning direction, wherein the control unit adjusts a movement amount of the recording head which is moved in the sub-scanning direction in the sub-scannings on the basis of a detection result of the detection unit. | 05-29-2014 |
Patent application number | Description | Published |
20140074291 | MOTION PREDICTION CONTROL DEVICE AND METHOD - (A) One or both of an object and a robot are measured by measuring units to acquire sensor information. (B) The internal state of one or both of the object and the robot is predicted and updated by a state estimation unit on the basis of the sensor information. (C) The internal state is stored by a data storage unit. (D) The robot is controlled by a robot control unit. At (B), the internal state is updated by the state estimation unit at an arbitrary timing that is independent of the control cycle of the robot. At (D), a prediction value necessary for controlling the robot is calculated by the robot control unit at a control cycle on the basis of the latest internal state stored in the data storage unit. | 03-13-2014 |
20140367523 | SPACE DEBRIS REMOVING DEVICE AND SPACE DEBRIS REMOVING METHOD - Provided are a space debris removing device and a method which enable easy installation of a deceleration device to space debris undergoing a tumbling motion. The space debris removing device includes: a propulsion device ( | 12-18-2014 |
20150235380 | THREE-DIMENSIONAL OBJECT RECOGNITION DEVICE AND THREE-DIMENSIONAL OBJECT RECOGNITION METHOD - A 3D-object recognition device includes: a matching unit to compare a 3D-object in an image based on the image data with a 3D-shape model corresponding to the 3D-object to associate correlated feature points with each other by pattern matching; a model updating unit to update the 3D-shape model based on the feature points associated by the matching unit; a motion estimation unit to estimate motion of the 3D-object based on a history of the position and attitude of the 3D-shape model updated by the model updating unit to estimate a 3D-shape model at an arbitrary time in the future; and a validity determination unit to compare the feature points associated by the matching unit with the 3D-shape model estimated by the motion estimation unit and cause the model updating unit to update the 3D-shape model based on only the feature points determined to be valid. | 08-20-2015 |
20150352716 | FORCE CONTROL ROBOT AND METHOD FOR CONTROLLING SAME - An end effector includes a pair of machining tools. The pair of machining tools is separated by an interval in one direction perpendicular to a tool rotational axis and rotatable around the tool rotational axis. The pair of machining tools is position-controlled, and is force-controlled in a machining direction perpendicular to the one direction and an axial direction of the tool rotational axis, and is torque-controlled around the tool rotational axis. | 12-10-2015 |
Patent application number | Description | Published |
20100165556 | ELECTRONIC APPARATUS - An electronic apparatus includes a casing and a first reinforcement portion. The casing is rectangular and includes, on a first side wall of a first corner portion, a first hole portion into which an antitheft member is capable of being inserted. The first reinforcement portion is opposed to an inner side of the first side wall of the first corner portion and includes a second hole portion that is in communication with the first hole portion and constitutes a fixing hole capable of fixing the antitheft member together with the first hole portion. | 07-01-2010 |
20140292646 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD - According to the present disclosure, there is provided an information processing apparatus, including a first housing, a second housing, having a display section which displays information, in which the display section is reversed between a first position and a second position, a connection section which rotatably connects the second housing with respect to the first housing, a posture detection section which detects any of the four postures of a first posture, a second posture, a third posture, and a fourth posture, and a display control section which controls a display state of the display section in accordance with a detection result of the posture detection section. | 10-02-2014 |
20140293525 | ELECTRONIC APPARATUS - There is provided an electronic apparatus, including a first housing, a second housing which has a display section and a support member supporting the display section, and a housing connection section which rotatably connects the second housing with respect to the first housing. The support member includes a first support section connected to the housing connection section, a second support section which fixedly supports the display section, and a support connection section, positioned between the first support section and the second support section, which has a flexibility to rotatably connect the second support section with respect to the first support section. | 10-02-2014 |
Patent application number | Description | Published |
20160079185 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - The memory cell array includes a memory string and a select transistor. The memory string includes plural memory cells connected in series, the memory string being formed to extend in a first direction as a lengthwise direction. The select transistor is connected to one end of the memory string. In the wiring section, a conductive layer and an interlayer insulating layer are laminated alternately to form plural layers. The conductive layer functions as a gate electrode of the memory cells and the select transistor. One select transistor includes plural conductive layers, and the plural conductive layers are connected in common by a common first contact. The plurality of the conductive layers and the first contact include a barrier metal formed in a periphery thereof. The plurality of the conductive layers and the first contact are in contact without the barrier metal therebetween at a boundary thereof. | 03-17-2016 |
20160079255 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FORMANUFACTURING SAME - According to one embodiment, a stacked body includes electrode layers and first insulating layers alternately stacked. An isolation region extends in the stacked body, the isolation region dividing the stacked body into first regions. First semiconductor members extend in one of the first regions in a stacked direction of the stacked body. A memory film is provided between one of the first semiconductor members and one of the electrode layers. A insulating region extends in the one of the first regions in the stacked direction. A composition of a second region of the one of the electrode layers is different from a composition of a third region of the one of the electrode layers. The second region is in contact with the insulating region, the third region being in contact with the isolation region. | 03-17-2016 |
20160079257 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded. | 03-17-2016 |
Patent application number | Description | Published |
20100315857 | RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween. | 12-16-2010 |
20100321979 | RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectification connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a value of voltage which is applied to the memory element to change a resistance of the memory element reversibly between first and second values. The rectification includes a p-type semiconductor layer, an n-type semiconductor layer and an intrinsic semiconductor layer therebetween. The rectification has a first diffusion prevention area in the intrinsic semiconductor layer. | 12-23-2010 |
20110127483 | RESISTANCE CHANGE MEMORY AND MANUFACTURING METHOD THEREOF - According to one embodiment, a resistance-change memory of embodiment includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit. The cell unit is provided at an intersection of the first interconnect line and the second interconnect line. The cell unit includes a non-ohmic element having a silicide layer on at least one of first and second ends thereof, and a memory element to store data in accordance with a reversible change in a resistance state. The silicide layer includes a 3d transition metal element which combines with an Si element to form silicide and which has a first atomic radius, and at least one kind of an additional element having a second atomic radius greater than the first atomic radius. | 06-02-2011 |
20110133149 | RESISTANCE CHANGE MEMORY AND MANUFACTURING METHOD THEREOF - According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit which is provided between the first interconnect line and the second interconnect line and which includes a non-ohmic element and a memory element, the non-ohmic element including a conductive layer provided on at least one of first and second ends of the cell unit and a silicon portion provided between the first and second ends, the memory element being connected to the non-ohmic element via the conductive layer and storing data in accordance with a reversible change in a resistance state, wherein the non-ohmic element includes a first silicon germanium region in the silicon portion. | 06-09-2011 |
20110233501 | RESISTANCE CHANGE MEMORY - According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit which is provided at the intersection of the first interconnect line and the second interconnect line and which includes a memory element and a non-ohmic element that are connected in series. The memory element stores data in accordance with a change in a resistance state. The non-ohmic element includes a metal layer, a first semiconductor layer containing a first impurity, and a second semiconductor layer which is provided between the first semiconductor layer and the metal layer and which has an unevenly distributed layer. | 09-29-2011 |
20110233507 | RESISTANCE CHANGE MEMORY AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, a cell unit which is provided at the intersection of the first interconnect line and the second interconnect line and which includes a memory element and a non-ohmic element that are connected in series. The non-ohmic element has a first semiconductor layer which includes at least one diffusion buffering region and a conductive layer adjacent to the first semiconductor layer. The diffusion buffering region is different in crystal structure from a semiconductor region except for the diffusion buffering region in the first semiconductor layer. | 09-29-2011 |
20130062589 | RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectification connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a value of voltage which is applied to the memory element to change a resistance of the memory element reversibly between first and second values. The rectification includes a p-type semiconductor layer, an n-type semiconductor layer and an intrinsic semiconductor layer therebetween. The rectification has a first diffusion prevention area in the intrinsic semiconductor layer. | 03-14-2013 |
20130070517 | Resistance Change Memory - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween. | 03-21-2013 |
20130264535 | RESISTANCE CHANGE MEMORY AND MANUFACTURING METHOD THEREOF - According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit which is provided between the first interconnect line and the second interconnect line and which includes a non-ohmic element and a memory element, the non-ohmic element including a conductive layer provided on at least one of first and second ends of the cell unit and a silicon portion provided between the first and second ends, the memory element being connected to the non-ohmic element via the conductive layer and storing data in accordance with a reversible change in a resistance state, wherein the non-ohmic element includes a first silicon germanium region in the silicon portion. | 10-10-2013 |
20130292627 | RESISTANCE CHANGE MEMORY AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, a cell unit which is provided at the intersection of the first interconnect line and the second interconnect line and which includes a memory element and a non-ohmic element that are connected in series. The non-ohmic element has a first semiconductor layer which includes at least one diffusion buffering region and a conductive layer adjacent to the first semiconductor layer. The diffusion buffering region is different in crystal structure from a semiconductor region except for the diffusion buffering region in the first semiconductor layer. | 11-07-2013 |
20130337628 | RESISTANCE CHANGE MEMORY AND MANUFACTURING METHOD THEREOF - According to one embodiment, a resistance-change memory of embodiment includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting with the first direction, and a cell unit. The cell unit is provided at an intersection of the first interconnect line and the second interconnect line. The cell unit includes a non-ohmic element having a silicide layer on at least one of first and second ends thereof, and a memory element to store data in accordance with a reversible change in a resistance state. The silicide layer includes a 3d transition metal element which combines with an Si element to form silicide and which has a first atomic radius, and at least one kind of an additional element having a second atomic radius greater than the first atomic radius. | 12-19-2013 |
20150085562 | RESISTANCE CHANGE MEMORY - A resistance change memory includes a first conductive line extending in a first direction, a second conductive line extending in a second direction which is crossed to the first direction, a cell unit including a memory element and a rectifying element connected in series between the first and second conductive lines, and a control circuit which is connected to both of the first and second conductive lines. The control circuit controls a voltage to change a resistance of the memory element between first and second values reversibly. The rectifying element is a diode including an anode layer, a cathode layer and an insulating layer therebetween. | 03-26-2015 |
Patent application number | Description | Published |
20110260131 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a memory portion and a rectifying element. The memory portion includes a cathode electrode, a memory layer, and an anode electrode. The rectifying element is connected to one of the cathode electrode and the anode electrode, or incorporates the memory portion into an inner portion of the rectifying element. The rectifying element includes a first semiconductor layer, a second semiconductor layer, and an insulating layer provided between the first semiconductor layer and the second semiconductor layer, and the first semiconductor layer and the second semiconductor layer are a p | 10-27-2011 |
20120025160 | NONVOLATILE MEMORY DEVICE - According to one embodiment, a nonvolatile memory device includes a stacked structure. The stacked structure includes a plurality of first interconnects, a plurality of second interconnects and a functional layer. The plurality of first interconnects extend in a first direction. The plurality of second interconnects are spaced from the first interconnects and extend in a second direction crossing the first direction. The functional layer is provided at each crossing position between the plurality of first interconnects and the plurality of second interconnects and has a transitioning function of transitioning between different resistance states and a rectifying function of rectifying current. The functional layer includes a metal layer, an opposed layer and a semiconductor layer. The semiconductor layer is provided between the metal layer and the opposed layer and is in contact with each of the metal layer and the opposed layer. | 02-02-2012 |
20130062590 | METHOD FOR MANUFACTURING NONVOLATILE STORAGE DEVICE AND NONVOLATILE STORAGE DEVICE - According to one embodiment, a method for manufacturing a nonvolatile storage device. The device includes a plurality of first conductive layers each extending in a first direction, a plurality of second conductive layers each extending in a second direction and spaced from the first layers, and memory cells each provided between the first layers and the second layers and including a rectifying element including a semiconductor layer, and a variable resistance element stacked with the rectifying element. The method includes a film formation step, a heating step and a patterning step. The film formation step is configured to form a rectifying element material film including an amorphous semiconductor film. The heating step is configured to heat the rectifying element material film. The patterning step is configured to form the rectifying element including the semiconductor layer by patterning the rectifying element material film after the heating step. | 03-14-2013 |
20140070157 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a memory portion and a rectifying element. The memory portion includes a cathode electrode, a memory layer, and an anode electrode. The rectifying element is connected to one of the cathode electrode and the anode electrode, or incorporates the memory portion into an inner portion of the rectifying element. The rectifying element includes a first semiconductor layer, a second semiconductor layer, and an insulating layer provided between the first semiconductor layer and the second semiconductor layer, and the first semiconductor layer and the second semiconductor layer are a p | 03-13-2014 |
Patent application number | Description | Published |
20120043517 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE - A nonvolatile semiconductor storage device according to an embodiment includes a first line; a second line that intersects the first line; and a memory cell that includes a memory element and a non-ohmic element, the memory cell being provided at the intersection of the first line and the second line while the memory element and the non-ohmic element are series-connected, data being stored in the memory element according to a change of a resistance state, wherein the non-ohmic element includes a metallic layer, an intrinsic semiconductor layer that is joined to the metallic layer, and a doped semiconductor layer that is joined to the intrinsic semiconductor layer and contains a first dopant. | 02-23-2012 |
20120063245 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE - A nonvolatile semiconductor storage device according to an embodiment includes a write/erase unit, during data write or erase, the write/erase unit supplying a first electric pulse to a selected memory cell, the first electric pulse having an electric energy to an extent that an physical state of a memory element of the selected memory cell does not transition and accumulating charges in a rectifying element of the selected memory cell, after supplying the first electric pulse, and a certain pulse interval thereafter, and supplying a second electric pulse to the selected memory cell, the second electric pulse having larger electric energy than the first electric pulse, the second electric pulse causing the physical state of the memory element of the selected memory cell to transition. | 03-15-2012 |
20130234086 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device according to an embodiment comprises a semiconductor layer, a variable resistance layer, a sidewall layer, and a buried layer. The semiconductor layer functions as a rectifying device. The variable resistance layer is provided above or below the semiconductor layer and reversibly changes its resistance. The sidewall layer is in contact with a sidewall of the semiconductor layer. The buried layer is embedded in the sidewall layer and is made of material different from that of the sidewall layer. These configurations may adjust the electrical characteristics of the rectifying device to any value. | 09-12-2013 |
20140183433 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device according to an embodiment comprises a semiconductor layer, a variable resistance layer, a sidewall layer, and a buried layer. The semiconductor layer functions as a rectifying device. The variable resistance layer is provided above or below the semiconductor layer and reversibly changes its resistance. The sidewall layer is in contact with a sidewall of the semiconductor layer. The buried layer is embedded in the sidewall layer and is made of material different from that of the sidewall layer. These configurations may adjust the electrical characteristics of the rectifying device to any value. | 07-03-2014 |
20140313813 | SEMICONDUCTOR MEMORY DEVICE AND OPERATION METHOD THEREOF - This semiconductor memory device comprises: a memory cell array including plural bit lines, plural word lines intersecting the plurality of bit lines, and memory cells provided at intersections of the plural bit lines and the plural word lines; and a control unit operative to control a voltage applied to the bit line and the word line. The control unit, when performing a certain operation consecutively on a plurality of the memory cells, selects a first bit line selected from among the plural bit lines and a first word line selected from among the plural word lines to perform a first operation on a first memory cell. Then, in a subsequent second operation following this first operation, selects a second bit line different from the first bit line and a second word line different from the first word line to select a second memory cell. | 10-23-2014 |
20140321194 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD THEREOF - This nonvolatile semiconductor memory device comprises a memory cell array including a plurality of bit lines, a plurality of word lines intersecting the plurality of bit lines, and memory cells provided at intersections of the plurality of bit lines and the plurality of word lines, and further comprises a control unit for controlling a voltage applied to the bit lines and word lines. The memory cell includes a variable resistance element and a rectifier element. The control unit provides a first potential difference to a selected memory cell via a selected bit line and a selected word line, and then provides a second potential difference to the selected memory cell via the selected bit line and the selected word line, the second potential difference being for erasing a residual charge. | 10-30-2014 |
20150109868 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to the embodiment includes a memory cell array including memory cells; and a data write unit, the memory cells including a first selected memory cell defined for a memory cell targeted to data write, a second selected memory cell defined for a memory cell targeted to the data write next to the first selected memory cell, and non-selected memory cells defined for other memory cells, and the data write unit, at the time of write operation to the first selected memory cell, providing the second selected memory cell with a first non-selection electric pulse having electric energy within a range causing no change in the physical state of a memory element, and providing the non-selected memory cells with a second non-selection electric pulse having smaller electric energy than the first non-selection electric pulse. | 04-23-2015 |
Patent application number | Description | Published |
20110128315 | LENS SHEET AND PRINTER - A lens sheet has an external shape of a rectangle or a square defined by four sheet ends in a vertical direction thereto. The lens sheet includes: a first surface, on which a plurality of lenses extending in a direction inclined to one of the sheet ends are arranged in parallel with each other; and a second surface opposite to the first surface, on which a printing is to be performed or to which a printed medium is to be stuck. | 06-02-2011 |
20150355471 | DISPLAY APPARATUS - A display apparatus includes a screen formed in an arcuate shape centering on a center axis and a projection device configured to project, along projecting directions orthogonal to the center axis and different from one another, images corresponding to the projecting directions on the inner circumferential surface or the outer circumferential surface of the screen. The screen includes a retroreflective layer having a reflection surface directed to the projection device and a diffusion layer arranged on the projection device side with respect to the retroreflective layer and configured to diffuse, when transmitting light made incident from the retroreflective layer, the light wider in a first direction along the center axis than in a second direction, which is a circumferential direction centering on the center axis. | 12-10-2015 |
20150362742 | DISPLAY APPARATUS - A transmissive screen formed in an arc shape around a center axis, and, when light entering an inner circumferential surface is output from an outer circumferential surface, having a diffusion angle in a first direction as a direction along the center axis wider than a diffusion angle in a second direction as a circumferential direction around the center axis, projection devices that are arranged at equal intervals along the second direction around the center axis and respectively project image lights on the inner circumferential surface, and a display control device that allows the projection devices to project the image lights so that partial images formed by portions of the respectively projected image lights of the projection devices may be observed as one visually recognized image having the partial images arranged in the second direction at viewpoints set outside of the outer circumferential surface along the second direction are provided. | 12-17-2015 |
Patent application number | Description | Published |
20100141780 | View Projection Matrix Based High Performance Low Latency Display Pipeline - A projection system uses a transformation matrix to transform a projection image p in such a manner so as to compensate for surface irregularities on a projection surface. The transformation matrix makes use of properties of light transport relating a projector to a camera. A display pipeline of user-supplied image modification processing modules are reduced by first representing the processing modules as multiple, individual matrix operations. All the matrix operations are then combined with, i.e., multiplied to, the transformation matrix to create a modified transformation matrix. The created transformation matrix is then used in place of the original transformation matrix to simultaneously achieve both image transformation and any pre and post image processing defined by the image modification processing modules. | 06-10-2010 |
20100323133 | INK JET RECORDING MEDIUM WITH LENTICULAR LENSES - Disclosed is a recording medium with a lenticular lens for ink jet recording. The recording medium includes: a lenticular lens layer having a convex part surface, on which a plurality of semicylindrical or arcuate and elongated convexes are arranged in parallel, and a backside surface; and an ink absorptive layer provided on the backside surface of the lenticular lens layer. In the recording medium, an ink permeable layer for avoiding the stay of ink droplets on a recorded face after printing, or an adhesive layer for rendering the recording medium easily fixable to a wall, a mount and the like, or a temporarily applicable part is further provided. | 12-23-2010 |
20110298960 | View Projection Matrix Based High Performance Low Latency Display Pipeline - A projection system uses a transformation matrix to transform a projection image p in such a manner so as to compensate for surface irregularities on a projection surface. The transformation matrix makes use of properties of light transport relating a projector to a camera. A display pipeline of user-supplied image modification processing modules are reduced by first representing the processing modules as multiple, individual matrix operations. All the matrix operations are then combined with, i.e., multiplied to, the transformation matrix to create a modified transformation matrix. The created transformation matrix is then used in place of the original transformation matrix to simultaneously achieve both image transformation and any pre and post image processing defined by the image modification processing modules. | 12-08-2011 |
20120147110 | INK JET RECORDING MEDIUM WITH LENTICULAR LENSES - Disclosed is a recording medium with a lenticular lens for ink jet recording. The recording medium includes: a lenticular lens layer having a convex part surface, on which a plurality of semicylindrical or arcuate and elongated convexes are arranged in parallel, and a backside surface; and an ink absorptive layer provided on the backside surface of the lenticular lens layer. In the recording medium, an ink permeable layer for avoiding the stay of ink droplets on a recorded face after printing, or an adhesive layer for rendering the recording medium easily fixable to a wall, a mount and the like, or a temporarily applicable part is further provided. | 06-14-2012 |
20130337199 | INK JET RECORDING MEDIUM WITH LENTICULAR LENSES - Disclosed is a recording medium with a lenticular lens for ink jet recording. The recording medium includes: a lenticular lens layer having a convex part surface, on which a plurality of semicylindrical or arcuate and elongated convexes are arranged in parallel, and a backside surface; and an ink absorptive layer provided on the backside surface of the lenticular lens layer. In the recording medium, an ink permeable layer for avoiding the stay of ink droplets on a recorded face after printing, or an adhesive layer for rendering the recording medium easily fixable to a wall, a mount and the like, or a temporarily applicable part is further provided. | 12-19-2013 |
Patent application number | Description | Published |
20080239311 | FLUORESCENCE DETECTION APPARATUS AND METHOD, AND PRISM USED THEREIN - In order to provide a fluorescence detection apparatus having a high sensitivity, a high processing capacity and a competitive edge in cost, the fluorescence detection apparatus according to this invention irradiate the sample with light so that the aspect ratio of the form of the irradiated region by light on the arrangement surface of the sample may be 1±0.1. The preferable form of irradiate region is not limited to one and varies to some extent depending on the item to be optimized. The form of irradiated region may be, for example, a circle, an equilateral triangle, a square, a regular hexagon and the like. | 10-02-2008 |
20090128807 | Photometric instrument - A metallic structure is provided on a surface of a substrate. A component having a longer wavelength than excitation light is detected from luminescence from fixation positions of biomolecules and emitted from a material other than the biomolecules, and is used for photometrical analysis. As the structure, usable is a particulate (a metallic structure of a size not larger than a wavelength of the excitation light), a minute protrusion, or a thin film with minute apertures, which are made of a metal such as gold, chrome, silver or aluminum. In the case of the particulate or the minute protrusion, photoluminescence of the structure is detected with a biomolecule being fixed thereon. In the case of the thin film with minute apertures, Raman scattered light of specimen solution around the biomolecules, and photoluminescence of the metallic structure near the biomolecules are detected with biomolecules being fixed in the apertures. | 05-21-2009 |
20090168061 | FLUORESCENCE DETECTION APPARATUS - A fluorescent detection apparatus relates to an analysis technique for qualitatively detecting or quantifying biomolecules by producing an evanescent field on a surface of a substrate, exciting fluorescently labelled biomolecules on the substrate surface in the evanescent field, and detecting the resultant fluorescent light emitted from the biomolecules. The fluorescent detection apparatus has a configuration in which a well is provided in a surface opposing to a sample substrate of a prism, the well is filled with a matching liquid, and the matching liquid is filled between the sample substrate and the prism, thereby improving operability and providing a stable evanescent field. | 07-02-2009 |
20110272596 | FLUORESCENCE DETECTOR - A fluorescence detector in which a sample substrate is provided with a structure unit comprising a prism or a diffraction grating. After excitation light falling on the sample substrate is totally reflected at a biomolecule-immobilized face that is located in the opposite side of the structure unit, the structure unit allows the emission of the reflected light therefrom. To ensure multiple visual field measurement, a sample substrate-driving unit is provided to scan the sample substrate. | 11-10-2011 |
20110284768 | FLUORESCENCE ANALYZING DEVICE AND FLUORESCENCE ANALYZING METHOD - The present invention has an object to provide a method for efficiently detecting an image with a smaller number of pixels. | 11-24-2011 |
20120064527 | NUCLEIC ACID ANALYSIS DEVICE, NUCLEIC ACID ANALYSIS APPARATUS, AND NUCLEIC ACID ANALYSIS METHOD - The present invention relates to a nucleic acid analysis device in a nucleic acid analysis apparatus, whereby waste of reaction spots on the nucleic acid analysis device is eliminated and leakage of fluorescence excitation light to unobserved nucleic acid measurement regions is minimized. Specifically, the nucleic acid analysis device has a plurality of nucleic acid measurement regions, which are characterized in that one nucleic acid measurement region is disposed at a sufficient distance from the other nucleic acid measurement regions such that the other nucleic acid measurement regions do not enter an irradiation region. | 03-15-2012 |
20120097864 | FLUORESCENCE ANALYZING APPARATUS AND FLUORESCENCE DETECTING APPARATUS - Provided are a method and an apparatus for easily identifying and detecting fluorescent material types captured in respective reaction regions of a substrate, particularly, a method and an apparatus for identifying and measuring the fluorescence intensities of a plurality of fluorescent materials using a small pixel count. The fluorescence intensities of four or more types of fluorescent materials are divided by a dividing section at ratios different at least for each fluorescence maximum wavelength range, and are detected by at least one detector including pixels for detecting the light fluxes divided at the different ratios. The type of the fluorescent material is determined on the basis of the ratio of the detected fluorescence intensity of the same detection portion, and the fluorescence intensity is measured. | 04-26-2012 |
20130261413 | EQUIPMENT FOR IN VIVO DATA ACQUISITION AND ANALYSIS - To obtain a blood sugar level accurately, the location of a blood-vessel part is specified by using a first wavelength at which absorption by hemoglobin, which is a component unique to blood, is high, and data of light absorbance measured by using a second wavelength at which absorption by glucose is high is separated into a blood-vessel part and other parts. | 10-03-2013 |
20140038274 | NUCLEIC ACID ANALYSIS DEVICE, NUCLEIC ACID ANALYSIS APPARATUS, AND NUCLEIC ACID ANALYSIS METHOD - The present invention relates to a nucleic acid analysis device in a nucleic acid analysis apparatus, whereby waste of reaction spots on the nucleic acid analysis device is eliminated and leakage of fluorescence excitation light to unobserved nucleic acid measurement regions is minimized. Specifically, the nucleic acid analysis device has a plurality of nucleic acid measurement regions, which are characterized in that one nucleic acid measurement region is disposed at a sufficient distance from the other nucleic acid measurement regions such that the other nucleic acid measurement regions do not enter an irradiation region. | 02-06-2014 |