Patent application number | Description | Published |
20090096687 | METHODS AND APPARATUS FOR HIGH PERFORMANCE STRUCTURES - Methods and apparatus for components according to various aspects of the present invention operate in conjunction with reaction bonded silicon nitride (RBSN). In one embodiment, a missile radome comprises a wall defining the radome body, including a base and a tip. The wall may comprise a core and one or more skins adjacent the core, such as in a sandwich configuration. The core and the skins may have different densities. The radome wall may be configured to transmit wideband RF signals. The RBSN may be extruded to form the radome. | 04-16-2009 |
20120247151 | APPARATUS FOR PRODUCING A VITREOUS INNER LAYER ON A FUSED SILICA BODY, AND METHOD OF OPERATING SAME - An apparatus for producing a layer of vitreous silica adjacent at least a portion of an inner surface of a fused silica body is described, comprising a heat source disposed to apply sufficient heat to at least a portion of the inner surface to cause a layer of said at least a portion of the inner surface to vitrify. In certain embodiments the heat source is configured to heat at one time a relatively small area of the inner surface, and the apparatus comprises a positioning mechanism for moving the heat source with respect to the inner surface. In certain embodiments the heat source is a hydrogen-oxygen surface-mix fueled torch that is moved helically with respect to the inner surface of the body under the control of a programmed CNC motion control system. | 10-04-2012 |
20130167589 | FUSED SILICA BODY WITH VITREOUS SILICA INNER LAYER AND METHOD FOR MAKING THE SAME - A fused silica body comprising a layer of vitreous silica adjacent at least a portion of an inner surface is described in embodiments herein. In other embodiments, a method of making a fused silica body with a layer of vitreous silica adjacent at least a portion of an inner surface is described herein, comprising heating at least a portion of the inner surface to the point of vitrification. In certain embodiments, the method involves passing a linear local heat source over the inner surface in a particular manner, such as a helical fashion transverse to the linear shape, and may involve creating on the inner surface of the body overlapping swaths of temporarily melted silica material. | 07-04-2013 |
Patent application number | Description | Published |
20140372818 | Test-Per-Clock Based On Dynamically-Partitioned Reconfigurable Scan Chains - Aspects of the invention relate to a test-per-clock scheme based on dynamically-partitioned reconfigurable scan chains. Every clock cycle, scan chains configured by a control signal to operate in a shifting-launching mode shift in test stimuli one bit and immediately applies the newly formed test pattern to the circuit-under-test; and scan chains configured by the control signal to operate in a capturing-compacting-shifting mode shift out one bit of previously compacted test response data while compacting remaining bits of the previously compacted test response data with a currently-captured test response to form currently compacted test response data. A large number of scan chains may be configured by the control signal to work in a mission mode. After a predetermined number of clock cycles, a different control signal may be applied to reconfigure and partition the scan chains for applying different test stimuli. | 12-18-2014 |
20140372819 | Scan Chain Configuration For Test-Per-Clock Based On Circuit Topology - Aspects of the invention relate to generating scan chain configurations for test-per-clock based on circuit topology. With various implementations of the invention, weight vectors between scan chains in a circuit are first determined. Based on the weight vectors, a scan chain configuration is generated by assigning some scan chains in the scan chains to a stimuli group and some other scan chains in the scan chains to a compacting group. Here, the stimuli group comprises scan chains to operate in a shifting-launching mode, and the compacting group comprises scan chains to operate in a capturing-compacting-shifting mode. | 12-18-2014 |
20140372820 | Fault-Driven Scan Chain Configuration For Test-Per-Clock - Aspects of the invention relate to using fault-driven techniques to generate scan chain configurations for test-per-clock. A plurality of test cubes that detect a plurality of faults are first generated. Scan chains for loading specified bits of the test cubes are then assigned to a stimuli group. From the plurality of test cubes, a test cube that detects a large number of faults that do not propagate exclusively to scan chains in the stimuli group is selected. One or more scan chains that are not in the stimuli group and are needed for observing the large number of faults are assigned to a compacting group. The number of scan chains either in the compacting group or in both of the compacting group and the stimuli group may be limited to a predetermined number. | 12-18-2014 |
20140372821 | Scan Chain Stitching For Test-Per-Clock - Various aspects of the present invention relate to scan chain stitching techniques for test-per-clock. With various implementations of the invention, a plurality of scan cell partitions are generated based on combinational paths between scan cells. Scan cells may be assigned to one or more pairs of scan cell partitions based on combinational paths between the scan cells. Each pair of the scan cell partitions comprises one stimuli partition and one compacting partition. Using the plurality of scan cell partitions generated, scan chains are formed based on at least information of combinational paths between scan cell partitions in the plurality of scan cell partitions. The formed scan chains are to be dynamically divided into three groups during a test, which are configured to operate in a shifting-launching mode, a capturing-compacting-shifting mode and a mission mode, respectively. | 12-18-2014 |
20140372824 | Test Generation For Test-Per-Clock - Aspects of the invention relate to test generation techniques for test-per-clock. Test cubes may be generated by adding constraints to a conventional automatic test pattern generator. During a test cube merging process, a first test cube is merged with one or more test cubes that are compatible with the first test cube to generate a second test cube. The second test cube is shifted by one bit along a direction of scan chain shifting to generate a third test cube. The third test cube is then merged with one or more test cubes in the test cubes that are compatible with the third test cube to generate a fourth test cube. The shifting and merging operations may be repeated for a predetermined number of times. | 12-18-2014 |