Patent application number | Description | Published |
20090055717 | ARCHITECTURE AND CONTROL OF REED-SOLOMON LIST DECODING - Systems and methods are provided for implementing list decoding in a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. The soft-information can be organized into an order of combinations of error events for list decoding. An RS decoder can employ a list decoder that uses a pipelined list decoder architecture. The list decoder can include one or more syndrome modification circuits that can compute syndromes in parallel. A long division circuit can include multiple units that operate to compute multiple quotient polynomial coefficients in parallel. The list decoder can employ iterative decoding and a validity test to generate error indicators. The iterative decoding and validity test can use the lower syndromes. | 02-26-2009 |
20090063937 | ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING - Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed. | 03-05-2009 |
20090083608 | ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING - Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed. | 03-26-2009 |
20090292976 | ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR IDENTIFICATION AND EVALUATION - Systems and methods are provided for implementing error identification and evaluation for a Reed-Solomon (RS) error-correction code (ECC) system. The BMA algorithm and/or list decoding may produce one or more error locator polynomials that are related to a decision-codeword. An accelerated Chien search can be used to more quickly evaluate the one or more error locator polynomial. If the accelerated Chien search identifies a valid error locator polynomial, a normal Chien search can be used to identify error locations, and Forney's algorithm or an equivalent technique can be used to evaluate the error values. A RS ECC decoder can include a computation circuit that evaluates an error locator polynomial or an error evaluator polynomial. The computation circuit can include computation components that receive the coefficients of the polynomials. | 11-26-2009 |
20100091399 | ARCHITECTURE FOR DATA STORAGE SYSTEMS - A system includes N first-in first-out (FIFO) modules, a buffer manager module, and N input/output (I/O) modules, where N is an integer greater than 1. The buffer manager module retrieves a set of N data units from a buffer and outputs the set of N data units to the N FIFO modules in parallel at a time, respectively. The N I/O modules receive the set of N data units from the N FIFOs in parallel, respectively, and output the N data units to a medium. | 04-15-2010 |
20110041007 | Controller For Reading Data From Non-Volatile Memory - The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands. | 02-17-2011 |
20120011298 | INTERFACE MANAGEMENT CONTROL SYSTEMS AND METHODS FOR NON-VOLATILE SEMICONDUCTOR MEMORY - A control system includes a control module configured to control data transfer events of blocks of data between an interface management module and a non-volatile semiconductor memory based on at least two descriptors for each one of the data transfer events. The non-volatile semiconductor memory is prepared for a read event or a program event of the data transfer event. The interface management module and the non-volatile semiconductor memory are configured to operate within a solid-state memory drive. A command management module is configured to generate a parameter signal based on the at least two descriptors. The interface management module is configured to generate instruction signals based on the parameter signal and transmit the instruction signals to the non-volatile semiconductor memory to perform the read event or the program event. | 01-12-2012 |
20120137197 | ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING - Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed. | 05-31-2012 |
20120159052 | Descriptor Scheduler - Methods, systems and computer program products for providing a sequencer that schedules job descriptors are described. The sequencer can manage the scheduling of the job descriptors for execution based on the availability of their respective segments and channels. For example, the sequencer can check the status of the segments, and identify one or more segments that are in busy or full state, or one or more segments that are in non-busy or empty state. Based on the status check, the sequencer can execute job descriptors out of order, and in particular, give priorities to job descriptors whose associated segments are available over job descriptors whose associated segments are in busy or full state. In doing so, pending job descriptors can be processed quicker and unnecessary latency can be avoided. | 06-21-2012 |
20120284588 | ARCHITECTURE AND CONTROL OF REED-SOLOMON ERROR-CORRECTION DECODING - Systems and methods are provided for implementing various aspects of a Reed-Solomon (RS) error-correction system. A detector can provide a decision-codeword from a channel and can also provide soft-information for the decision-codeword. If the decision-codeword corresponds to an inner code and an RS code is the outer code, a soft-information map can process the soft-information for the decision-codeword to produce soft-information for a RS decision-codeword. A RS decoder can employ the Berlekamp-Massey algorithm (BMA), list decoding, and a Chien search, and can include a pipelined architecture. A threshold-based control circuit can be used to predict whether list decoding will be needed and can suspend the list decoding operation if it predicts that list decoding is not needed. | 11-08-2012 |
20120290798 | Data Compression and Compacting for Memory Devices - Embodiments of the present disclosure provide apparatuses and methods for determining a compacting arrangement to store logical addressable units, which include compressed data sectors, into hardware addressable units of a storage device. The compacting arrangement is based on compression information associated with the logical addressable units. A write module is used to write the compressed data sectors to the storage device according to the compacting arrangement. | 11-15-2012 |
20150039817 | METHOD AND APPARATUS FOR PARALLEL TRANSFER OF BLOCKS OF DATA BETWEEN AN INTERFACE MODULE AND A NON-VOLATILE SEMICONDUCTOR MEMORY - A system including a non-volatile semiconductor memory (NVSM), an interface module and a control module. The NVSM stores first and second blocks of data. The first or second block of data is non-page based such that a size of the first block of data or a size of the second block of data is not an integer multiple of a page of data. The interface module transfers the first and second blocks of data during respectively a first data transfer event and a second data transfer event. The control module, based on descriptors, controls the first and second data transfer events such that the interface module transfers the first block of data between the interface module and the NVSM while transferring the second block of data between the interface module and the NVSM. The descriptors include respective sets of instructions for transferring the first and second blocks of data. | 02-05-2015 |