Patent application number | Description | Published |
20100061835 | Robot hand and humanoid robot having the same - A robot hand, which minimizes the number of actuators and adjusts the bending angles of joints through torque limiters to flexibly and finely control finger units, and a humanoid robot having the robot hand. The robot hand includes a torque limiter disposed on at least any one joint of a plurality of joints to link another joint of the plurality of joints with the any one joint through a power transmission member. | 03-11-2010 |
20100162846 | Robot joint driving apparatus and robot having the same - Disclosed are a robot joint driving apparatus and a robot having the same, capable of minimizing tension of a wire applied to a movable member by installing an idle pulley in a power transmission structure using a ball screw apparatus and the wire. The robot joint driving apparatus includes a reversible drive motor, a pair of movable members performing a linear movement according to rotation of the reversible drive motor, a wire connected to the movable members from both directions of the movable members, an idle pulley rotatably installed at one side of the wire, a joint part rotatably installed at an opposite side of the wire, and an adjustment unit to adjust tension of the wire. | 07-01-2010 |
20110056321 | ROBOT JOINT DRIVING METHOD, COMPUTER-READABLE MEDIUM, DEVICE ASSEMBLY AND ROBOT HAVING THE SAME - Disclosed herein are a robot joint driving method, computer-readable medium, and device assembly which conducts motions similar to those of humans, and a robot having the same. These motions are achieved by arranging joint driving devices suited to characteristics of respective joints. The robot joint driving device assembly includes a tendon-type joint driving device using a wire, and a harmonic drive-type joint driving device using a gear reduction method. The tendon-type joint driving device is used to drive a rotary joint requiring high back-drivability, and the harmonic drive-type joint driving device is used to drive a rotary joint requiring high rigidity and high precision. | 03-10-2011 |
20110167945 | ROBOT JOINT DRIVING APPARATUS, ROBOT HAVING THE SAME AND CABLE LINKAGE METHOD OF ROBOT JOINT DRIVING APPARATUS - A robot joint driving apparatus has an improved structure, a robot having the same, and a cable linkage method of the robot joint driving apparatus. In the robot joint driving apparatus, lines of a cable to drive a robot joint unit are connected plural times in parallel, thereby increasing torsional stiffness of the robot joint unit. Further, a cable fixing unit is provided on an output pulley, thereby preventing slippage of the cable on the output pulley. Moreover, the overall size of the robot joint driving apparatus is reduced due to an improved power transmission structure from a driving motor to the output pulley. | 07-14-2011 |
Patent application number | Description | Published |
20080253194 | FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF - A method of programming a plurality of memory cells in a flash memory device from a first state to a second state includes verifying the plurality of memory cells using a verify voltage having a level increased according to an increase in a program loop number; and programming the plurality of memory cells using a program voltage having an increment decreased according to an increase in the program loop number, wherein the verifying and programming steps constitute a program loop, the program loop being terminated at a point in time when a level of the verify voltage reaches to a voltage range of the second state. | 10-16-2008 |
20090200596 | FABRICATION METHOD AND STRUCTURE FOR PROVIDING A RECESSED CHANNEL IN A NONVOLATILE MEMORY DEVICE - A method of fabricating a nonvolatile memory device includes preparing a semiconductor substrate including a cell array region. The method also includes forming a recessed region in the cell array region by etching the semiconductor substrate. The method includes etching at least a portion of the semiconductor substrate that partially includes the recessed region and forming first and second trenches that differ in depth, intersect the recessed region, and link with each other. The method includes forming a device isolation layer having rugged bottoms and defining an active region by filling an insulating material in the first and second trenches. The method includes forming a gate insulation layer on the semiconductor substrate of the active region including the recessed region and forming a gate structure on the gate insulation layer, to fill the recessed region, the gate structure including a floating gate, an intergate insulating pattern, and a control gate. | 08-13-2009 |
20130320457 | SEMICONDUCTOR DEVICES INCLUDING SOURCE/DRAIN STRESSORS AND METHODS OF MANUFACTURING THE SAME - A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer. | 12-05-2013 |
20140151810 | SEMICONDUCTOR DEVICES INCLUDING PROTRUDING INSULATION PORTIONS BETWEEN ACTIVE FINS - A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins. | 06-05-2014 |
20140159158 | Semiconductor Devices - A semiconductor device includes transistors provided on a substrate and including first dopant regions, first contacts extending from the first dopant regions in a first direction, a long via provided on the first contacts and connected in common to first contacts that are adjacent one another, and a common conductive line provided on the long via and extending in a second direction crossing the first direction. The common conductive line electrically connects the first dopant regions to each other. | 06-12-2014 |
20140162460 | METHOD OF FORMING A PATTERN - A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region. | 06-12-2014 |
20140312427 | Semiconductor Devices Having Fin Shaped Channels - Semiconductor devices are provided. The semiconductor devices include a first fin; a first gate electrode intersecting the first fin; a first elevated source and/or drain on respective sides of the first gate electrode on the first fin; and a first field dielectric film adjacent the first fin. The first field dielectric film includes a first part below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain. | 10-23-2014 |
20140346602 | SEMICONDUCTOR DEVICES INCLUDING PROTRUDING INSULATION PORTIONS BETWEEN ACTIVE FINS - A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins. | 11-27-2014 |
20140353769 | SEMICONDUCTOR DEVICES INCLUDING PROTRUDING INSULATION PORTIONS BETWEEN ACTIVE FINS - A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins. | 12-04-2014 |
20150054089 | SEMICONDUCTOR DEVICES HAVING 3D CHANNELS, AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING 3D CHANNELS - A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film, and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film. | 02-26-2015 |
20150357329 | SEMICONDUCTOR DEVICES INCLUDING SOURCE/DRAIN STRESSORS AND METHODS OF MANUFACTURING THE SAME - A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer. | 12-10-2015 |
Patent application number | Description | Published |
20090099885 | METHOD FOR RISK ANALYSIS USING INFORMATION ASSET MODELLING - A method for risk analysis using information asset modeling. The method has the steps of: (a) identifying an information asset which uses or provides a network service; (b) identifying a threat on the information asset through a computer network; (c) identifying a vulnerability of the information asset; (d) calculating an AL (attack likelihood) by using a CVSS (Common Vulnerability Scoring System) score obtained by converting a severity caused by a success of an attack on the vulnerability into a standardized value; (e) computing the value of the information asset so as to calculate an IM (impact analysis); and (f) multiplying the calculated AL and IM so as to determine an RL (risk level) for the information asset. | 04-16-2009 |
20090100077 | NETWORK RISK ANALYSIS METHOD USING INFORMATION HIERARCHY STRUCTURE - A network risk analysis method using an information hierarchy structure is divided into 7 steps and results derived from each of the process steps are stored in a database to get a hierarchy structure for the respective steps. By using the information hierarchy structure, a network manager can easily comprehend the relationship between the derived results from each step to make a risk analysis in an efficient manner. | 04-16-2009 |
20090106839 | METHOD FOR DETECTING NETWORK ATTACK BASED ON TIME SERIES MODEL USING THE TREND FILTERING - Method for detecting network attack based on time series model using the trend filtering. The method has the steps of: a) removing a trend component from the time series data to extract a residual component; and b) detecting an anomaly by applying a time series model to the residual component. | 04-23-2009 |
20090106843 | SECURITY RISK EVALUATION METHOD FOR EFFECTIVE THREAT MANAGEMENT - Provided is a security risk evaluation method for threat management. According to the present invention, new threats or vulnerabilities for a network which should be protected (target network) are collected, and a threat management environment is assessed by checking whether or not to apply attack-attempt detection rules and vulnerability assessment rules for assets related to the threats or vulnerabilities. Based on the assessment result, the range and level of response are previously checked and complemented, and corresponding risk evaluation is provided. Therefore, the threat management environment can be managed effectively. | 04-23-2009 |
20090106844 | SYSTEM AND METHOD FOR VULNERABILITY ASSESSMENT OF NETWORK BASED ON BUSINESS MODEL - Provided are a system and a method for vulnerability assessment of a network based on a business model. In the system and method, services of each node existing in a monitoring target network are monitored, and a business model is generated on the basis of the monitored services so as to perform vulnerability assessment on the business model. Accordingly, it is possible to guarantee the safety and availability of the system and the network while the vulnerability assessment is performed. | 04-23-2009 |
20090122721 | HYBRID NETWORK DISCOVERY METHOD FOR DETECTING CLIENT APPLICATIONS - A hybrid network discovery method for detecting client applications. The method has the steps of: (a) applying test traffic packets to a network which is to be measured, and analyzing responses so as to check target nodes; (b) transmitting a protocol request packet to each of the checked target nodes; and (c) when the URL of the header of the protocol request packet coincides with a site for a specific application of the target node, extracting the URL and the IP address of the target node. | 05-14-2009 |