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| 20090029079 | Nylon Food Casing - Tubular, biaxially stretched, heat shrinkable seven layer film food casings comprising inner polyamide layer and two outer polyamide or functional group modified polyolefin layers on either side of core layers of EVOH and polyethylene, having two adhesive layers, and a coextrusion process for making the film. | 01-29-2009 |
| 20100007043 | Multi-Tube Extrusion Apparatus and Method - A method and apparatus for producing a plurality of bi-oriented, heat-shrinkable thermoplastic tubular films is disclosed. Thermoplastic resin is extruded through a plurality of annular dies to form a plurality of molten plastic tubes. The tubes are cooled and solidified and sent through a plurality of pinch rollers to stretch the tubes simultaneously in a machine and transverse direction, creating a plurality of tubular films. The films are cooled and heated, and then relaxed simultaneously in a machine and transverse direction. Winding rollers then wind up the finished tubular films. | 01-14-2010 |
| 20110027404 | MULTI-TUBE EXTRUSION APPARATUS AND METHOD - A method and apparatus for producing a plurality of bi-oriented, heat-shrinkable thermoplastic tubular films is disclosed. Thermoplastic resin is extruded through a plurality of annular dies to form a plurality of molten plastic tubes. The tubes are cooled and solidified and sent through a plurality of pinch rollers to stretch the tubes simultaneously in a machine and transverse direction, creating a plurality of tubular films. The films are cooled and heated, and then relaxed simultaneously in a machine and transverse direction. Winding rollers then wind up the finished tubular films. | 02-03-2011 |
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| 20120074268 | MULTI-PURPOSE CABLE SUPPORT HAVING BENDABLE STEM - A cable support has a body formed from a strap of self-supporting material, with a hook portion having a free end and an opposite attachment end. A stem is formed by the attachment end and includes an end segment movable relative to a main segment between a first, linearly-aligned position, and a second, normally-oriented position for facilitating selective mounting of the support on vertical and horizontal substrates. | 03-29-2012 |
| 20120297723 | WALL STUD MOUNTING BRACKET FOR SECURING AND POSITIONING FLEXIBLE CONDUIT AND CABLE - A support assembly connected with a stud for securing and guiding conduit and/or cable is provided. The support assembly includes, but is not limited to, a securing arm for securing and guiding the conduit and/or cable and an engaging tab coupled with an end of the securing arm. The engaging tab includes a first engagement member facing a second engagement member, a side engagement member connecting the first and second engagement members together, and a first compressible member extending in a first direction D | 11-29-2012 |
| 20120298816 | ELECTRICAL BOX SUPPORT ASSEMBLY - An electrical box support assembly for mounting an electrical box between a pair of studs is provided. The electrical box support assembly includes, but is not limited to, a pair of telescoping overlapping struts and a pair of engaging tabs detachably coupled with each end of the pair of telescoping overlapping struts. Each strut has a face to which the electrical box may be secured. Each of the pair of engaging tabs includes a first engagement member for primarily engaging a closed face of one of the studs and a side engagement member connected generally perpendicular with the first engagement member. Each end of the pair of telescoping overlapping struts may be detachably coupled at one of two positions on each engaging tab in order to accommodate electrical boxes of varying depths. | 11-29-2012 |
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| 20090047870 | Reverse Shallow Trench Isolation Process - A method of polishing a substrate surface containing silicon nitride and silicon oxide or silicon dioxide, comprising movably contacting the surface with a polishing pad and having a polishing composition disposed between the polishing pad and the surface, said polishing composition comprising 1) hydrous ceria abrasive; 2) polyvinylpyridine, vinyl pyridine copolymers, or both, and 3) water, wherein at 2 psi downpressure the silicon nitride removal rate is at least 500 angstroms per minute and the selectivity of silicon nitride to silicon oxide is at least 30. | 02-19-2009 |
| 20090057661 | Method for Chemical Mechanical Planarization of Chalcogenide Materials - A method and associated composition for chemical mechanical planarization of a chalcogenide-containing substrate (e.g., germanium/antimony/tellurium (GST)-containing substrate) are described. The composition and method afford low defect levels (e.g., scratches incurred during polishing) as well as low dishing and local erosion levels on the chalcogenide-containing substrate during CMP processing. | 03-05-2009 |
| 20090250656 | Free Radical-Forming Activator Attached to Solid and Used to Enhance CMP Formulations - A chemical mechanical polishing composition having: a fluid comprising water and at least one oxidizing compound that produces free radicals when contacted with an activator; and a plurality of particles having a surface and comprising at least one activator selected from ions or compounds of Cu, Fe, Mn, Ti, or mixtures thereof disposed on said surface, wherein at least a portion of said surface comprises a stabilizer. Preferred activators are selected from inorganic oxygen-containing compounds of B, W, Al, and P, for example borate, tungstate, aluminate, and phosphate. The activators are preferably ions of Cu or Fe. Advantageously, certain organic acids, and especially dihydroxy enolic acids, are included in an amount less than about 4000 ppm. Advantageously, activator is coated onto abrasive particles after the particles have been coated with stabilizer. | 10-08-2009 |
| 20090261291 | Chemical-Mechanical Planarization Composition Having Benzenesulfonic Acid and Per-Compound Oxidizing Agents, and Associated Method for Use - A composition and associated method for chemical mechanical planarization (or other polishing) are described. The composition contains an abrasive, benzenesulfonic acid compound, a per-compound oxidizing agent, and water. The composition affords tunability of removal rates for metal, barrier layer materials, and dielectric layer materials in metal CMP processes. The composition is particularly useful in conjunction with the associated method for metal CMP applications (e.g., step 2 copper CMP processes). | 10-22-2009 |
| 20090308836 | DIHYDROXY ENOL COMPOUNDS USED IN CHEMICAL MECHANICAL POLISHING COMPOSITIONS HAVING METAL ION OXIDIZERS - A chemical mechanical polishing composition contains 1) water, 2) optionally an abrasive material, 3) an oxidizer, preferably a per-type oxidizer, 4) a small amount of soluble metal-ion oxidizer/polishing accelerator, a metal-ion polishing accelerator bound to particles such as to abrasive particles, or both; and 5) at least one of the group selected from a) a small amount of a chelator, b) a small amount of a dihydroxy enolic compound, and c) a small amount of an organic accelerator. Ascorbic acid in an amount less than 800 ppm, preferably between about 100 ppm and 500 ppm, is the preferred dihydroxy enolic compound. The polishing compositions and processes are useful for substantially all metals and metallic compounds found in integrated circuits, but is particularly useful for tungsten. The present invention also pertains to surface-modified colloidal abrasive polishing compositions and associated methods of using these compositions, particularly for chemical mechanical planarization, wherein the slurry comprises low levels of chelating free radical quenchers, non-chelating free radical quenchers, or both. | 12-17-2009 |
| 20110165777 | Method and Slurry for Tuning Low-K Versus Copper Removal Rates During Chemical Mechanical Polishing - A composition and associated method for the chemical mechanical planarization (CMP) of metal substrates on semiconductor wafers are described. The composition contains a nonionic fluorocarbon surfactant and a per-type oxidizer (e.g., hydrogen peroxide). The composition and associated method are effective in controlling removal rates of low-k films during copper CMP and provide for tune-ability in removal rates of low-k films in relation to removal rates of copper, tantalum, and oxide films. | 07-07-2011 |
| 20110252970 | Filtration Media for High Humidity Environments - The invention is directed to a nanofiber that contains at least one moisture sensitive polymer. The fiber also contains nanoparticles of a hydrogen bonding material incorporated into the body of the fiber. The hydrogen bonding material is present in an amount corresponding to greater than 2% of the polymer weight and the nanofiber has a mean fiber diameter measured along its length of less than one micron. Also included are filter media made from nanowebs of the fiber. | 10-20-2011 |
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| 20090001592 | METAL INTERCONNECT FORMING METHODS AND IC CHIP INCLUDING METAL INTERCONNECT - Methods of forming a metal interconnect and an IC chip including the metal interconnect are disclosed. One embodiment of the method may include providing an integrated circuit (IC) chip up to and including a middle of line (MOL) layer, the MOL layer including a contact positioned within a first dielectric; recessing the first dielectric such that the contact extends beyond an upper surface of the first dielectric; forming a second dielectric over the first dielectric such that the second dielectric surrounds at least a portion of the contact, the second dielectric having a lower dielectric constant than the first dielectric; forming a planarizing layer over the second dielectric; forming an opening through the planarizing layer and into the second dielectric to the contact; and forming a metal in the opening to form the metal interconnect. | 01-01-2009 |
| 20090117360 | SELF-ASSEMBLED MATERIAL PATTERN TRANSFER CONTRAST ENHANCEMENT - A non-photosensitive polymeric resist containing at least two immiscible polymeric block components is deposited on the planar surface. The non-photosensitive polymeric resist is annealed to allow phase separation of immiscible components and developed to remove at least one of the at least two polymeric block components. Nanoscale features, i.e., features of nanometer scale, including at least one recessed region having a nanoscale dimension is formed in the polymeric resist. The top surface of the polymeric resist is modified for enhanced etch resistance by an exposure to an energetic beam, which allows the top surface of the patterned polymeric resist to become more resistant to etching processes and chemistries. The enhanced ratio of etch resistance between the two types of surfaces provides improved image contrast and fidelity between areas having the top surface and the at least one recessed region. | 05-07-2009 |
| 20100123205 | METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS - A method of preventing surface decomposition of a III-V compound semiconductor is provided. The method includes forming a silicon film having a thickness from 10 Å to 400 Å on a surface of an III-V compound semiconductor. After forming the silicon film onto the surface of the III-V compound semiconductor, a high performance semiconductor device including, for example, a MOSFET, can be formed on the capped/passivated III-V compound semiconductor. During the MOSFET fabrication, a high k dielectric can be formed on the capped/passivated III-V compound semiconductor and thereafter, activated source and drain regions can be formed into the III-V compound semiconductor. | 05-20-2010 |
| 20100133694 | METAL INTERCONNECT AND IC CHIP INCLUDING METAL INTERCONNECT - A metal interconnect and an IC chip including the metal interconnect are disclosed. One embodiment of the method may include providing an integrated circuit (IC) chip up to and including a middle of line (MOL) layer, the MOL layer including a contact positioned within a first dielectric; recessing the first dielectric such that the contact extends beyond an upper surface of the first dielectric; forming a second dielectric over the first dielectric such that the second dielectric surrounds at least a portion of the contact, the second dielectric having a lower dielectric constant than the first dielectric; forming a planarizing layer over the second dielectric; forming an opening through the planarizing layer and into the second dielectric to the contact; and forming a metal in the opening to form the metal interconnect. | 06-03-2010 |
| 20110298017 | REPLACEMENT GATE MOSFET WITH SELF-ALIGNED DIFFUSION CONTACT - A replacement gate field effect transistor includes at least one self-aligned contact that overlies a portion of a dielectric gate cap. A replacement gate stack is formed in a cavity formed by removal of a disposable gate stack. The replacement gate stack is subsequently recessed, and a dielectric gate cap having sidewalls that are vertically coincident with outer sidewalls of the gate spacer is formed by filling the recess over the replacement gate stack. An anisotropic etch removes the dielectric material of the planarization layer selective to the material of the dielectric gate cap, thereby forming at least one via cavity having sidewalls that coincide with a portion of the sidewalls of the gate spacer. A portion of each diffusion contact formed by filling the at least one via cavity overlies a portion of the gate spacer and protrudes into the dielectric gate cap. | 12-08-2011 |
| 20110298061 | STRUCTURE AND METHOD FOR REPLACEMENT GATE MOSFET WITH SELF-ALIGNED CONTACT USING SACRIFICIAL MANDREL DIELECTRIC - The present disclosure provides a method for forming a semiconductor device that includes forming a replacement gate structure overlying a channel region of a substrate. A mandrel dielectric layer is formed overlying source and drain regions of the substrate. The replacement gate structure is removed to provide an opening exposing the channel region of the substrate. A functional gate structure is formed over the channel region including a work function metal layer. A protective cap structure is formed over the functional gate structure. At least one via is etched through the mandrel dielectric layer selective to the protective cap structure to expose a portion of at least one of the source region and the drain region. A conductive fill is then formed in the vias to provide a contact to the at least one of the source region and the drain region. | 12-08-2011 |
| 20120171818 | HYBRID BONDING INTERFACE FOR 3-DIMENSIONAL CHIP INTEGRATION - Each of a first substrate and a second substrate includes a surface having a diffusion resistant dielectric material such as silicon nitride. Recessed regions are formed in the diffusion resistant dielectric material and filled with a bondable dielectric material. The patterns of the metal pads and bondable dielectric material portions in the first and second substrates can have a mirror symmetry. The first and second substrates are brought into physical contact and bonded employing contacts between metal pads and contacts between the bondable dielectric material portions. Through-substrate-via (TSV) structures are formed through bonded dielectric material portions. The interface between each pair of bonded dielectric material portions located around a TSV structure is encapsulated by two diffusion resistant dielectric material layers so that diffusion of metal at a bonding interface is contained within each pair of bonded dielectric material portions. | 07-05-2012 |
| 20120181616 | STRUCTURE AND METHOD OF Tinv SCALING FOR HIGH k METAL GATE TECHNOLOGY - A complementary metal oxide semiconductor (CMOS) structure including a scaled n-channel field effect transistor (nFET) and a scaled p-channel field transistor (pFET) which do not exhibit an increased threshold voltage and reduced mobility during operation is provided Such a structure is provided by forming a plasma nitrided, nFET threshold voltage adjusted high k gate dielectric layer portion within an nFET gate stack, and forming at least a pFET threshold voltage adjusted high k gate dielectric layer portion within a pFET gate stack. In some embodiments, the pFET threshold voltage adjusted high k gate dielectric layer portion in the pFET gate stack is also plasma nitrided. The plasma nitrided, nFET threshold voltage adjusted high k gate dielectric layer portion includes up to 15 atomic % N | 07-19-2012 |
| 20120305989 | METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS - A method of preventing surface decomposition of a III-V compound semiconductor is provided. The method includes forming a silicon film having a thickness from 10 Å to 400 Å on a surface of an III-V compound semiconductor. After forming the silicon film onto the surface of the III-V compound semiconductor, a high performance semiconductor device including, for example, a MOSFET, can be formed on the capped/passivated III-V compound semiconductor. During the MOSFET fabrication, a high k dielectric can be formed on the capped/passivated III-V compound semiconductor and thereafter, activated source and drain regions can be formed into the III-V compound semiconductor. | 12-06-2012 |
| 20120309153 | METHOD TO PREVENT SURFACE DECOMPOSITION OF III-V COMPOUND SEMICONDUCTORS - A method of preventing surface decomposition of a III-V compound semiconductor is provided. The method includes forming a silicon film having a thickness from 10 Å to 400 Å on a surface of an III-V compound semiconductor. After forming the silicon film onto the surface of the III-V compound semiconductor, a high performance semiconductor device including, for example, a MOSFET, can be formed on the capped/passivated III-V compound semiconductor. During the MOSFET fabrication, a high k dielectric can be formed on the capped/passivated III-V compound semiconductor and thereafter, activated source and drain regions can be formed into the III-V compound semiconductor. | 12-06-2012 |
| 20120329230 | FABRICATION OF SILICON OXIDE AND OXYNITRIDE HAVING SUB-NANOMETER THICKNESS - A method of fabricating a silicon-containing oxide layer that includes providing a chemical oxide layer on a surface of a semiconductor substrate, removing the chemical oxide layer in an oxygen-free environment at a temperature of 1000° C. or greater to provide a bare surface of the semiconductor substrate, and introducing an oxygen-containing gas at a flow rate to the bare surface of the semiconductor substrate for a first time period at the temperature of 1000° C. The temperature is then reduced to room temperature during a second time period while maintaining the flow rate of the oxygen containing gas to provide a silicon-containing oxide layer having a thickness ranging from 0.5 Å to 10 Å. | 12-27-2012 |
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| 20100180983 | FUELING SYSTEM AND METHOD - A fuel storage system includes a fuel tank, a fueling receptacle in fluid communication with the tank, and a coil adjacent the fueling receptacle. The system also includes a controller configured to determine information about a state of fuel in the tank, and to cause a modulated current to be driven into the coil to generate an electromagnetic field. The modulated current represents the information about the state of fuel in the tank. | 07-22-2010 |
| 20100206887 | FUEL STORAGE SYSTEM AND METHOD FOR DETECTING A GAS PRESSURE THEREIN - A fuel storage system includes a storage vessel including a dielectric liner, a voltage sensor formed by a pair of plates disposed on opposing surfaces of the liner, and a controller configured to determine a gas pressure in the storage vessel based on voltages measured by the sensor. | 08-19-2010 |
| 20110139130 | Automotive Fuel System Leak Testing - Systems and methods for performing leak testing on fuel system components in hybrid vehicles during engine-off operating conditions are disclosed. For example, a fuel tank may include a pressure accumulator which may be filled with fuel via a fuel pump in order to generate a vacuum which may be used to diagnose leaks in the fuel system. | 06-16-2011 |
| 20110168705 | FUEL FILLER SYSTEM FOR AUTOMOTIVE VEHICLE - A fuel filler system for an automotive vehicle includes a filler pipe connected with a fuel tank and an interceptor mounted about an open end of the filler pipe, with the interceptor and filler pipe defining a generally annular contaminant collector having a drain extending from the collector. A filler cap closes both the open end of the filler pipe and the open end of the interceptor, so as to prevent ambient contamination from entering either the contaminant collector or the filler pipe. Removal of the filler cap from the filler pipe first causes venting of the fuel tank into the collector before a sealing condition between the filler cap and the interceptor is released. | 07-14-2011 |
| 20110192477 | PASSIVE-SIPHONING SYSTEM AND METHOD - A system for a vehicle is provided. The system may include a fuel tank including a first and a second interior region at least partially separated from each other. The system may further include a fuel pump including a pick-up positioned in only the first region and a passive-siphoning subsystem with a crossover-siphoning conduit communicating between the first and second regions, the conduit enclosing a wicking element. | 08-11-2011 |
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| 20100093830 | Modulation of MLCK-L Expression and Uses Thereof - In various aspects and embodiments the invention provides methods and reagents for controlling gene expression, and for treating disorders and diseases. Embodiments provide methods and reagents specifically for the regulation of MLCK expression and for the use thereof in treating disorders and diseases. Various embodiments provide methods and reagents for specifically down regulating the expression of MLCK-L more efficiently than that of MLCK-S, and for the use thereof in treating disorders and diseases. Embodiments provide siNA for the same, particularly siRNAs. Various of the embodiments are useful for the treatment of inflammatory disorders and diseases, including, for one example in this regard, Asthma. | 04-15-2010 |
| 20110092568 | MODULATION OF MLCK-L EXPRESSION AND USES THEREOF - In various aspects and embodiments the invention provides methods and reagents for controlling gene expression, and for treating disorders and diseases. Embodiments provide methods and reagents specifically for the regulation of MLCK expression and for the use thereof in treating disorders and diseases. Various embodiments provide methods and reagents for specifically down regulating the expression of MLCK-L more efficiently than that of MLCK-S, and for the use thereof in treating disorders and diseases. Embodiments provide siNA for the same, particularly siRNAs. Various of the embodiments are useful for the treatment of inflammatory disorders and diseases, including, for one example in the regard, Asthma. | 04-21-2011 |
