Patent application number | Description | Published |
20090031113 | Processor Array, Processor Element Complex, Microinstruction Control Appraratus, and Microinstruction Control Method - A processor array including area-saving microprogram memories is provided. In the processor array, microprogram memories of a plurality of adjacent processor arrays are shared. Effective data and position information | 01-29-2009 |
20090138770 | TEST SYSTEM OF RECONFIGURABLE DEVICE AND ITS METHOD AND RECONFIGURABLE DEVICE FOR USE THEREIN - A reconfigurable device test scheme is provided for making a test of a reconfigurable device with configuration data which is loaded a smaller number of times. A reconfigurable device used herein holds a plurality of configuration data and is capable of instantaneously switching which configuration is implemented thereby. Specifically, one transfer configuration data and one or more test configuration data are previously loaded in a configuration memory of the reconfigurable device, and a test is made while sequentially switching the transfer configuration data and the test configuration data. In this way, the same configuration data need not be reloaded over and over, so that the test can be made with a smaller number of times of loading as compared with before. | 05-28-2009 |
20100246240 | SEMICONDUCTOR DEVICE CONFIGURATION METHOD - A plurality of three-terminal variable resistance switching elements each having a source electrode, a drain electrode, and a gate electrode are connected to each other in series. The source electrode of each of the three-terminal variable resistance switching elements and the drain electrode of its adjacent three-terminal variable resistance switching element are connected to each other through a wiring segment to form a lane. A potential holding section for holding a predetermined potential level is connected to the wiring segment. A column group is configured by selecting one of the three-terminal variable resistance elements in each lane. A common gate line is connected to each of the gate electrodes of the three-terminal variable resistance elements belonging to the column group. | 09-30-2010 |
20100321062 | CONFIGURABLE CIRCUIT AND CONFIGURATION METHOD - A configurable circuit of the present invention includes a plurality of logic blocks ( | 12-23-2010 |
20110078645 | CIRCUIT DESIGN SYSTEM AND CIRCUIT DESIGN METHOD - A circuit design system | 03-31-2011 |
20110225558 | RECONFIGURABLE CIRCUIT GENERATION DEVICE, METHOD, AND PROGRAM - A reconfigurable circuit generation device comprises: a netlist generation unit that generates as a shared netlist a netlist that can be shared among a plurality of netlists having a common portion, and a resource reduction unit that reduces resources of the reconfigurable circuit where the plurality of netlists are to be implemented, in a range in which the shared netlist can be implemented. | 09-15-2011 |
20120007633 | RECONFIGURABLE LOGICAL CIRCUIT - Provided is a reconfigurable logic circuit that can effectively use a preposition logic that composes a logic block. The reconfigurable logic block according to the present invention includes a plurality of logic blocks ( | 01-12-2012 |
20120247534 | SOLAR POWER GENERATION APPARATUS - A solar power generation apparatus in which a solar cell unit is disposed at focal position in an optical system, which includes a single optical system and formulated so as to collect and spectrally separate incident light that falls in parallel to an optical axis, and focus each of the spectrally separated wavelength band lights at a different focal position on the optical axis. The solar cell unit includes a plurality of solar cells, each including, a junction unit disposed on a circumference of a substrate portion disposed along the optical axis, a surface of the junction portion forming a light receiving surface with a different sensitive wavelength band. The plurality of solar cells are arrayed along the optical axis, and each of the solar cells is disposed at one of the focal positions at which the wavelength band light corresponding to each the different sensitive wavelength band is focused. | 10-04-2012 |
20130009753 | Radio tag sensor system and method for calibrating same - A radio tag sensor system includes a plurality of radio tag sensor chips, which incorporate respective sensors, store unique identification numbers, a plurality of micro base stations, and a central processing unit which perform communications with the micro base stations via a connection network. Each of the micro base stations performs wireless communications with and wirelessly supplies electric power to only those of the radio tag sensor chips which are disposed in an assigned region thereof. Each of the assigned regions includes at least one radio tag sensor chip which is not included in the other assigned regions. The central processing unit controls the communications via the connection network. The central processing unit collects the sensed values from sensors of the radio tag sensor chips through the micro base stations, generates a spatial distribution map of the sensed values, and updates the spatial distribution map with time. | 01-10-2013 |
20130176051 | RECONFIGURABLE CIRCUIT - A reconfigurable circuit of the present invention is characterized in being provided with: a first programmable wiring group, which is disposed in the first direction; a second programmable wiring group, which is disposed in the second direction that intersects the first direction; a first switch element array, which connects the programmable wiring groups to each other at the intersecting points of the first programmable wiring group and the branch line group of a functional block input wiring group or at the intersecting points of the branch line group of the first programmable wiring group and the functional block input wiring group; a second switch element array, which connects the programmable wiring groups to each other at the intersecting points of the first programmable wiring group and functional block output wiring; and a third switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the first programmable wiring group. The reconfigurable circuit is also characterized in being provided with a fourth switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the functional block input wiring group, and/or a fifth switch element array, which connects the programmable wiring groups to each other at the intersecting points of the second programmable wiring group and the branch lines of the functional block output wiring. | 07-11-2013 |
20130335116 | RECONFIGURABLE CIRCUIT AND METHOD FOR REFRESHING RECONFIGURABLE CIRCUIT - A reconfigurable circuit ( | 12-19-2013 |
20140347095 | Bidirectional Buffer and Control Method Thereof - Bidirectional buffer | 11-27-2014 |