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Shin Hashimoto

Shin Hashimoto, Itami-Shi JP

Patent application numberDescriptionPublished
20090189190High Electron Mobility Transistor, Field-Effect Transistor, Epitaxial Substrate, Method of Manufacturing Epitaxial Substrate, and Method of Manufacturing Group III Nitride Transistor - Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 07-30-2009
20090194796Vertical Gallium Nitride Semiconductor Device and Epitaxial Substrate - Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (08-06-2009
20100230687III NITRIDE ELECTRONIC DEVICE AND III NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE - In a group III nitride hetero junction transistor 09-16-2010
20100230723High Electron Mobility Transistor, Field-Effect Transistor, and Epitaxial Substrate - Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (09-16-2010
20110049573GROUP III NITRIDE SEMICONDUCTOR WAFER AND GROUP III NITRIDE SEMICONDUCTOR DEVICE - A group III nitride semiconductor device and a group III nitride semiconductor wafer are provided. The group III nitride semiconductor device has a channel layer comprising group III nitride-based semiconductor containing Al. The group III nitride semiconductor device can enhance the mobility of the two-dimensional electron gas and improve current characteristics. The group III nitride semiconductor wafer is used to make the group III nitride semiconductor device. The group III nitride semiconductor wafer comprises a substrate made of Al03-03-2011
20110097880FILM DEPOSITION METHOD - Provided is a film deposition method capable of improving the crystal characteristic near an interface according to the lattice constant of a material that will constitute a thin film to be deposited. Specifically, a substrate is curved relative to the direction along one main surface on which the thin film is to be deposited, according to the lattice constant the material that will constitute the thin film to be deposited and the lattice constant of a material constituting the one main surface. The thin film is deposited on the one main surface of the substrate with the substrate curved.04-28-2011

Patent applications by Shin Hashimoto, Itami-Shi JP

Shin Hashimoto, Osaka JP

Patent application numberDescriptionPublished
20080284026Semiconductor device and method for fabricating the same - A semiconductor device comprises a first insulating film formed on a semiconductor substrate, a first metal pattern formed on the first insulating film, a second insulating film formed on the first metal pattern, a second metal pattern formed on the second insulating film, and a third metal pattern formed in the second insulating film and connecting between the first metal pattern and the second metal pattern. The third metal pattern is a single continuous structure, and the principal orientation axes of crystals of a metal constituting the third metal pattern are parallel to the principal surface of the semiconductor substrate.11-20-2008
20090051007SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device is composed of: an interconnect made of a first conductive film and a second conductive film that are stacked in sequence from the interconnect underside on an insulating film formed on a substrate; and a capacitor composed of a lower capacitor electrode made of the first conductive film, a dielectric film formed on the lower capacitor electrode, and an upper capacitor electrode made of the second conductive film and formed on the dielectric film.02-26-2009
20100048004SEMICONDUCTOR DEVICE AND PROCESS FOR MANUFACTURING THE SAME - A production method for a semiconductor device includes the steps of: (a) providing a semiconductor substrate having a semiconductor layer 02-25-2010

Patent applications by Shin Hashimoto, Osaka JP

Shin Hashimoto, Hyogo JP

Patent application numberDescriptionPublished
20090194847A1xGa yIn 1-x-yN CRYSTAL SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SAME08-06-2009

Shin Hashimoto, Tokyo JP

Patent application numberDescriptionPublished
20090147793PACKET COMMUNICATION NETWORK AND PACKET COMMUNICATION METHOD - A packet communication network is connected between a first external network and a second external network. The packet communication network includes a classifier, a parallel network that includes a plurality of physically or logically independent networks, and a multiplexing router. The classifier classifies a packet input from the first external network to one of the networks in the parallel network. Each of the networks in the parallel network transmits the packet to the multiplexing router. The multiplexing router multiplexes a packet received from the networks in the parallel network and outputs the multiplexed packet to the second external network.06-11-2009