| Patent application number | Description | Published |
|---|
| 20080254603 | Method of fabricating semiconductor device - There is provided a method of fabricating semiconductor devices that allows ion implantation to be performed at high temperature with ions accelerated with high energy to help to introduce dopant in a semiconductor substrate, in particular a SiC semiconductor substrate, at a selected region to sufficient depth. To achieve this the method includes the steps of: providing the semiconductor substrate at a surface thereof with a mask layer including a polyimide resin film, or a SiO | 10-16-2008 |
| 20080277696 | Lateral Junction Field Effect Transistor and Method of Manufacturing The Same - A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties. | 11-13-2008 |
| 20090152566 | Junction field-effect transistor - A junction field-effect transistor comprises an n-type semiconductor layer having a channel region, a buffer layer formed on the channel region and a p | 06-18-2009 |
| 20090315082 | LATERAL JUNCTION FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A lateral junction field effect transistor includes a first gate electrode layer arranged in a third semiconductor layer between source/drain region layers, having a lower surface extending on the second semiconductor layer, and doped with p-type impurities more heavily than the second semiconductor layer, and a second gate electrode layer arranged in a fifth semiconductor layer between the source/drain region layers, having a lower surface extending on a fourth semiconductor layer, having substantially the same concentration of p-type impurities as the first gate electrode layer, and having the same potential as the first gate electrode layer. Thereby, the lateral junction field effect transistor has a structure, which can reduce an on-resistance while maintaining good breakdown voltage properties. | 12-24-2009 |
| 20110165764 | METHOD FOR MANUFACTURING SEMICONDUCTOR SUBSTRATE - A first silicon carbide substrate having a first back-side surface and a second silicon carbide substrate having a second back-side surface are prepared. The first and second silicon carbide substrates are placed so as to expose each of the first and second back-side surfaces in one direction. A connecting portion is formed to connect the first and second back-side surfaces to each other. The step of forming the connecting portion includes a step of forming a growth layer made of silicon carbide on each of the first and second back-side surfaces, using a sublimation method of supplying a sublimate thereto in the one direction. | 07-07-2011 |
| 20110175107 | SILICON CARBIDE SUBSTRATE - A base portion is made of silicon carbide and has a main surface. At least one silicon carbide layer is provided on the main surface of the base portion in a manner exposing a region of the main surface along an outer edge of the main surface. At least one protection layer is provided on this region of the main surface of the base portion along the outer edge of the main surface. Thus, a silicon carbide substrate can be polished with high in-plane uniformity. | 07-21-2011 |
| 20110284873 | SILICON CARBIDE SUBSTRATE - A silicon carbide substrate has a substrate region and a support portion. The substrate region has a first single crystal substrate. The support portion is joined to a first backside surface of the first single crystal. The dislocation density of the first single crystal substrate is lower than the dislocation density of the support portion. At least one of the substrate region and the support portion has voids. | 11-24-2011 |
| 20110306181 | METHOD OF MANUFACTURING SILICON CARBIDE SUBSTRATE - A method of manufacturing a silicon carbide substrate includes the steps of: preparing a base substrate formed of silicon carbide and a SiC substrate formed of single crystal silicon carbide; fabricating a stacked substrate by stacking the base substrate and the SiC substrate to have their main surfaces in contact with each other; heating the stacked substrate to join the base substrate and the SiC substrate and thereby fabricating a joined substrate; and heating the joined substrate such that a temperature difference is formed between the base substrate and the SiC substrate, and thereby discharging voids formed at the step of fabricating the joined substrate at an interface between the base substrate and the SiC substrate to the outside. | 12-15-2011 |
