Shin-Chan
Shin-Chan Kang, Yongin-Si KR
Patent application number | Description | Published |
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20080307260 | SEMICONDUCTOR IC INCORPORATING A CO-DEBUGGING FUNCTION AND TEST SYSTEM - A semiconductor IC capable of debugging two or more processors at the same time by means of a single debugger and a semiconductor IC test system. The semiconductor IC includes processors operating at different frequencies, a trigger circuit which causes all of the processors to be in a debugging state when one of the processors is in the debugging state, and a JTAG circuit applying a boundary scan operation to the processors connected to a JTAG pin in series. | 12-11-2008 |
20100088564 | SEMICONDUCTOR IC INCORPORATING A CO-DEBUGGING FUNCTION AND TEST SYSTEM - A semiconductor IC capable of debugging two or more processors at the same time by means of a single debugger and a semiconductor IC test system. The semiconductor IC includes processors operating at different frequencies, a trigger circuit which causes all of the processors to be in a debugging state when one of the processors is in the debugging state, and a JTAG circuit applying a boundary scan operation to the processors connected to a JTAG pin in series. | 04-08-2010 |
Shin-Chan Kang, Seoul KR
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20080288688 | Bus system and method of arbitrating the same - A bus system, which may prevent data from being incorrectly transferred when an early termination occurs during a burst mode, may include a bus, for example, an advanced high-performance bus (AHB), at least one bus master device, a bus arbiter and at least one transfer mode selection circuit. The at least one bus master device may generate a burst cycle control signal, a transfer start signal and a bus control request signal for requesting control of the bus, and may be activated in response to a bus control grant signal, so as to exchange data via the bus. The bus arbiter may generate the bus control grant signal in response to the bus control request signal and provide the bus control grant signal to the bus master device. The at least one transfer mode selection circuit may convert a burst mode into a single mode to generate a selection signal, when the bus control grant signal is deactivated before a burst mode operation is completed. | 11-20-2008 |
Shin-Chan Lin, Taipei County TW
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20090038923 | KEYBOARD - A keyboard includes a keycap, a pivot structure, a base and an X-structure. The keycap includes a bottom surface, a first edge and a second edge. The pivot structure includes two first engaging portions and two second engaging portions. The first engaging portions are disposed on the bottom surface and have a first distance away from the first edge. The second engaging portions are respectively disposed corresponding to the first engaging portions and have a second distance away from the second edge. The base is disposed under the keycap. One end of the X-structure is connected to the pivot structure of the keycap and the other end of the X-structure is movably connected to the base, thus, the keycap moves upward and downward corresponding to the base. | 02-12-2009 |
Shin-Chan Lin, Taoyuan TW
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20140305781 | KEYSWITCH AND KEYBOARD THEREOF - A keyswitch includes a base, a keytop, and first and second support members rotatably intersecting with each other. The keytop has an engaging slot having a rotation space and an opening. The first support member has a first pivot shaft pivoted to the engaging slot and a first connecting mechanism movably connected to the base. When the first pivot shaft is passing through the opening, the engaging slot squeezes the first pivot shaft to cause deformation of a groove of the first pivot shaft so as to make the first pivot shaft have a first size. When the first pivot shaft enters the rotation space, the amount of deformation of the groove decreases to make the first pivot shaft have a second size greater than the first size and a gap of the opening, so that the first pivot shaft could be constrained in the engaging slot. | 10-16-2014 |