Patent application number | Description | Published |
20120214433 | TRANSMITTER WITH CLASS E AMPLIFIER - According to one embodiment, a transmitter includes a first buffer, a second buffer, a logic circuit, and a class E power amplifier. The first buffer receives a first sinusoidal signal, and converts the first sinusoidal signal to a first rectangular wave signal. The second buffer receives a second sinusoidal signal having a phase delay with respect to the first sinusoidal signal, and converts the second sinusoidal signal to a second rectangular wave signal. The logic circuit receives the first and second rectangular wave signals, and performs logical operation processing on the first and second rectangular wave signals to generate a logic signal with a predetermined duty cycle. The class E power amplifier receives the logic signal, and performs amplification operation based on the logic signal. | 08-23-2012 |
20130251071 | RECEIVER - A receiver includes a channel selection filter that receives an input signal, filters the input signal, and outputs the filtered input signal as a first signal, an amplifier that receives the first signal from the channel selection filter, amplifies the first signal, and outputs the amplified first signal as a second signal, a first detector that receives the second signal from the amplifier and outputs a third signal after delaying and detecting the second signal, a second detector that receives the second signal from the amplifier and outputs a fourth signal after performing pulse count detection or quadrature detection on the second signal, a switching circuit that selects one of the third signal and the fourth signal and outputs the selected signal as a demodulated signal through an output terminal, and a control circuit that controls the switching circuit to select either the third signal or the fourth signal. | 09-26-2013 |
20140323061 | TRANSMITTER WITH CLASS E AMPLIFIER - According to one embodiment, a transmitter includes a first buffer, a second buffer, a logic circuit, and a class E power amplifier. The first buffer receives a first sinusoidal signal, and converts the first sinusoidal signal to a first rectangular wave signal. The second buffer receives a second sinusoidal signal having a phase delay with respect to the first sinusoidal signal, and converts the second sinusoidal signal to a second rectangular wave signal. The logic circuit receives the first and second rectangular wave signals, and performs logical operation processing on the first and second rectangular wave signals to generate a logic signal with a predetermined duty cycle. The class E power amplifier receives the logic signal, and performs amplification operation based on the logic signal. | 10-30-2014 |