Patent application number | Description | Published |
20090202415 | PROCESS FOR PRODUCING HIGH-PURITY SILICON AND APPARATUS - When high purity silicon is produced through a gas-phase reaction between silicon tetra-chloride and zinc in a reaction furnace, the produce silicon is obtained as block or molten state. after the reaction in which the silicon is not in contact with air and reaction temperature is maintained at melting point of the silicon or less. | 08-13-2009 |
20090293262 | BIPOLAR PLATE FOR FUEL CELL AND METHOD FOR MANUFACTURING SAME - In a bipolar plate for a fuel cell including a metal substrate and a metallic coating formed on at least part of a surface of the metal substrate, the durability or the resilience is elevated by suitably selecting a material or a shape of the metal substrate and/or the metallic coating. The material of the metal substrate includes one or more of metals or metal alloys selected from a group consisting of iron, nickel, alloys thereof and stainless steel; and the metallic coating includes a combination of conductive platinum-group metal oxides. The metal substrate may be a thermally oxidized substrate, and the metallic coating may be a conductive oxide. Further, the metallic coating may be a metallic porous element or a metallic porous element having a passivity prevention layer on the surface thereof. | 12-03-2009 |
20090301895 | ELECTROLYSIS SYSTEM AND METHOD - A molten salt electrolysis apparatus and a molten metal electrolyzing method using such a device are disclosed having an electrolysis vessel ( | 12-10-2009 |
20130280625 | GAS DIFFUSION ELECTRODE - A method of preparing a gas diffusion electrode comprising a diffusion layer, and a reaction layer arranged to each other, wherein the diffusion layer is prepared by i) admixing a) sacrificial material, b) polymer and c) a metal-based material and d) optional further components, wherein the sacrificial material has a release temperature below about 275° C. and is added in an amount from about 1 to about 25 wt % based on the total weight of components a)-d) admixed; ii) forming a diffusion layer from the admixture of step i); iii) heating the forming diffusion layer to a temperature lower than about 275° C. so as to release at least a part of said sacrificial material from the diffusion layer. A gas diffusion electrode comprising a diffusion layer and a reaction layer arranged to one another, wherein the diffusion layer has a porosity ranging from about 60 to about 95%, and an electrolytic cell comprising the electrode. An electrolytic cell, a fuel cell comprising the gas diffusion electrode and a metal-air battery comprising the gas diffusion electrode. | 10-24-2013 |
Patent application number | Description | Published |
20120058610 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is provided. The method includes forming a gate electrode on a semiconductor substrate; forming a dopant implantation area in the semiconductor substrate by implanting a dopant in the semiconductor substrate, using the gate electrode as a mask; forming sidewalls on the gate electrode; forming a first recess by etching the semiconductor substrate, using the gate electrode and the sidewalls as a mask; forming a second recess by removing the dopant implantation area positioned below the sidewalls; and forming a source area and a drain area by causing a semiconductor material to grow in the first recess and the second recess. | 03-08-2012 |
20120108025 | METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device which includes forming a gate insulating film and a gate electrode over a semiconductor substrate, forming a first recess in the first semiconductor substrate on both sides of the gate electrode by dry etching, forming a second recess by removing a bottom and sidewalls of the first recess by wet etching, and forming a semiconductor layer in the second recess. | 05-03-2012 |
20130210207 | FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF DYNAMIC THRESHOLD TRANSISTOR - A method includes: etching a silicon substrate except for a silicon substrate portion on which a channel region is to be formed to form first and second trenches respectively at a first side and a second side of the silicon substrate portion; filling the first and second trenches by epitaxially growing a semiconductor layer having etching selectivity against silicon and further a silicon layer; removing the semiconductor layer selectivity by a selective etching process to form voids underneath the silicon layer respectively at the first side and the second side of the substrate portion; burying the voids at least partially with a buried insulation film; forming a gate insulation film and a gate electrode on the silicon substrate portion; and forming a source region in the silicon layer at the first side of the silicon substrate portion and a drain region at the second side of the silicon substrate portion. | 08-15-2013 |
20140193960 | FABRICATION METHOD OF SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF DYNAMIC THRESHOLD TRANSISTOR - A method includes: etching a silicon substrate except for a silicon substrate portion on which a channel region is to be formed to form first and second trenches respectively at a first side and a second side of the silicon substrate portion; filling the first and second trenches by epitaxially growing a semiconductor layer having etching selectivity against silicon and further a silicon layer; removing the semiconductor layer selectivity by a selective etching process to form voids underneath the silicon layer respectively at the first side and the second side of the substrate portion; burying the voids at least partially with a buried insulation film; forming a gate insulation film and a gate electrode on the silicon substrate portion; and forming a source region in the silicon layer at the first side of the silicon substrate portion and a drain region at the second side of the silicon substrate portion. | 07-10-2014 |