Patent application number | Description | Published |
20080307909 | Electrical condition monitoring method for polymers - An electrical condition monitoring method utilizes measurement of electrical resistivity of a conductive composite degradation sensor to monitor environmentally induced degradation of a polymeric product such as insulated wire and cable. The degradation sensor comprises a polymeric matrix and conductive filler. The polymeric matrix may be a polymer used in the product, or it may be a polymer with degradation properties similar to that of a polymer used in the product. The method comprises a means for communicating the resistivity to a measuring instrument and a means to correlate resistivity of the degradation sensor with environmentally induced degradation of the product. | 12-18-2008 |
20090146234 | MICROELECTRONIC IMAGING UNITS HAVING AN INFRARED-ABSORBING LAYER AND ASSOCIATED SYSTEMS AND METHODS - Infrared (IR) absorbing layers and microelectronic imaging units that employ such layers are disclosed herein. In one embodiment, a method of manufacturing a microelectronic imaging unit includes attaching an IR-absorbing lamina having a filler material to a backside die surface of an imager workpiece. An individual imaging die is singulated from the workpiece such that a section of the infrared-absorbing lamina remains attached to the individual imaging die. The individual imaging die is coupled to an interposer substrate with a portion of the IR-absorbing lamina positioned therebetween. In another embodiment, the IR-absorbing lamina is a die attach film and the filler material is carbon black. | 06-11-2009 |
20100013074 | HIGH DENSITY STACKED DIE ASSEMBLIES, STRUCTURES INCORPORATED THEREIN AND METHODS OF FABRICATING THE ASSEMBLIES - A stacked semiconductor die assembly includes at least two partially offset semiconductor dice with bond pads located adjacent at least one peripheral side thereof supported on a redistribution element formed of a material of substantially similar CTE to that of the dice, and a paddle-less lead frame secured to the redistribution element during fabrication, including encapsulation. The assembly is configured to be substantially vertically symmetrical with respect to inner ends of lead fingers of the lead frame to facilitate uniform encapsulant flow. The semiconductor die assembly may be configured in a package with leads extending from two sides thereof, such as a thin small outline package (TSOP), or four sides thereof, such as a quad flat pack (QFP). | 01-21-2010 |
20100127409 | MICROELECTRONIC DEVICE WAFERS INCLUDING AN IN-SITU MOLDED ADHESIVE, MOLDS FOR IN-SITU MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS, AND METHODS OF MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS - A microelectronic device wafer includes an adhesive molded in-situ on the wafer. Adhesives and wafers are positioned in molds and a method that includes drawing in the molds at least a partial vacuum and partially curing the adhesive provides an in-situ molded adhesive that is positioned on the wafer. The adhesives can be in liquid, solid, or other forms prior to molding. During molding, the adhesive can be partially cured by heating or irradiating. | 05-27-2010 |
20110291146 | DRY FLUX BONDING DEVICE AND METHOD - Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner. | 12-01-2011 |
20130119527 | SEMICONDUCTOR DIE ASSEMBLIES WITH ENHANCED THERMAL MANAGEMENT, SEMICONDUCTOR DEVICES INCLUDING SAME AND RELATED METHODS - A semiconductor die assembly comprises a plurality of semiconductor dice in a stack. Another semiconductor die is adjacent to the stack and has a region, which may comprise a relatively higher power density region, extends peripherally beyond the stack. Conductive elements extend between and electrically interconnect integrated circuits of semiconductor dice in the stack and of the other semiconductor die. Thermal pillars are interposed between semiconductor dice of the stack, and a heat dissipation structure, such as a lid, is in contact with an uppermost die of the stack and the high power density region of the other semiconductor die. Other die assemblies, semiconductor devices and methods of managing heat transfer within a semiconductor die assembly are also disclosed. | 05-16-2013 |
20130119528 | STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH MULTIPLE THERMAL PATHS AND ASSOCIATED SYSTEMS AND METHODS - Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a plurality of first semiconductor dies arranged in a stack and a second semiconductor die carrying the first semiconductor dies. The second semiconductor die can include a peripheral portion that extends laterally outward beyond at least one side of the first semiconductor dies. The semiconductor die assembly can further include a thermal transfer feature at the peripheral portion of the second semiconductor die. The first semiconductor dies can define a first thermal path, and the thermal transfer feature can define a second thermal path separate from the first semiconductor dies. | 05-16-2013 |
20130299868 | DRY FLUX BONDING DEVICE AND METHOD - Methods of forming devices, including LED devices, are described. The devices may include fluorinated compound layers. The methods described may utilize a plasma treatment to form the fluorinated compound layers. The methods described may operate to produce an intermetallic layer that bonds two substrates such as semiconductor wafers together in a relatively efficient and inexpensive manner. | 11-14-2013 |
20140015598 | SEMICONDUCTOR DEVICE PACKAGES INCLUDING THERMALLY INSULATING MATERIALS AND METHODS OF MAKING AND USING SUCH SEMICONDUCTOR PACKAGES - Semiconductor device packages comprise a first semiconductor device comprising a heat-generating region located on at least one end thereof. A second semiconductor device is attached to the first semiconductor device. At least a portion of the heat-generating region extends laterally beyond at least one corresponding end of the second semiconductor device. A thermally insulating material at least partially covers the end of the second semiconductor device. Methods of forming a semiconductor device packages comprise attaching a second semiconductor device to a first semiconductor device. The first semiconductor device comprises a heat-generating region at an end thereof. At least a portion of the heat-generating region extends laterally beyond an end of the second semiconductor device. The end of the second semiconductor device is at least partially covered with a thermally insulating material. | 01-16-2014 |
20140147989 | TEMPORARY ADHESIVES INCLUDING A FILLER MATERIAL AND RELATED METHODS - Temporary adhesives include a thermoplastic polymer comprising from about 30% by weight to about 80% by weight of the temporary adhesive, a solvent comprising from about 20% by weight to about 70% by weight of the temporary adhesive, and a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive. Methods of processing a semiconductor device wafer include bonding the semiconductor device wafer to a surface of a carrier substrate using a temporary adhesive including a filler material comprising from about 0.2% to about 5% by weight of the temporary adhesive, thinning the semiconductor device wafer, and, while the temporary adhesive remains on the surface of the carrier substrate proximate a peripheral edge thereof, subjecting the thinned semiconductor device wafer to one or more back side processing operations. Methods of forming a thinned semiconductor wafer include using such a temporary adhesive. | 05-29-2014 |
20140327130 | SEMICONDUCTOR DEVICE PACKAGES INCLUDING THERMALLY INSULATING MATERIALS AND METHODS OF MAKING AND USING SUCH SEMICONDUCTOR PACKAGES - Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is attached to the first semiconductor die. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. Methods of forming semiconductor devices may involve attaching a second semiconductor die to a first semiconductor die. The first semiconductor die includes a heat-generating region at a periphery thereof. At least a portion of the heat-generating region is located laterally outside a footprint of the second semiconductor die. A thermally insulating material is located on a side surface of the second semiconductor die. | 11-06-2014 |
20140367844 | UNDERFILL-ACCOMMODATING HEAT SPREADERS AND RELATED SEMICONDUCTOR DEVICE ASSEMBLIES AND METHODS - Heat spreaders for dissipating heat from semiconductor devices comprise a contact surface located within a recess on an underside of the heat spreader, the contact surface being configured to physically and thermally attach to a semiconductor device, and a trench extending into the heat spreader adjacent to the contact surface sized and configured to receive underfill material extending from the semiconductor device into the trench. Related semiconductor device assemblies may include these heat spreader and methods may include physically and thermally attaching these heat spreaders to semiconductor devices such that underfill material extends from a semiconductor device into the trench. | 12-18-2014 |