Shih-Chieh Chang
Shih-Chieh Chang, Fengyuan City TW
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20110091300 | TOP CAP OF BICYCLE HANDLEBAR STE TUBE AND METHOD FOR MANUFACTURING SAME - A top cap is provided for a bicycle handlebar stem. The top cap includes a cap body, which has a lower portion forming a fitting cylinder of a reduced diameter and a radially expanding circumferential shoulder atop the fitting cylinder. A barrel extends from a bottom of the fitting cylinder. The barrel forms a downward-facing hollow blind hole. The cap body forms a bolt head hole extending therethrough and coaxial with and communicating the blind hole. The barrel forms slits, which define a tightening section. | 04-21-2011 |
20130233119 | TOP CAP OF BICYCLE HANDLEBAR STEM TUBE AND METHOD FOR MANUFACTURING SAME - A top cap is provided for a bicycle handlebar stem. The top cap includes a cap body, which has a lower portion forming a fitting cylinder of a reduced diameter and a radially expanding circumferential shoulder atop the fitting cylinder. A barrel extends from a bottom of the fitting cylinder. The barrel forms a downward-facing hollow blind hole. The cap body forms a bolt head hole extending therethrough and coaxial with and communicating the blind hole. The barrel forms slits, which define a tightening section. | 09-12-2013 |
Shih-Chieh Chang, Tainan TW
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20100314256 | CURRENT-LEVELING ELECTROPLATING/ELECTROPOLISHING ELECTRODE - A current-leveling electrode for improving electroplating and electrochemical polishing uniformity in the electrochemical plating or electropolishing of metals on a substrate is disclosed. The current-leveling electrode includes a base electrode and at least one sub-electrode carried by the base electrode. The at least one sub-electrode has a width which is less than a width of the base electrode to impart a generally tapered, stepped or convex configuration to the current-leveling electrode. | 12-16-2010 |
Shih-Chieh Chang, Taipei Hsien TW
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20090288904 | TRANSMISSION AND STEERING SYSTEM FOR DOUBLE-HEAD VEHICLES - The present invention discloses a transmission and steering system of a double-head vehicle, comprising a first steering wheel; a front wheel group; a first signal acquisition and transceiver device which can output steering information according to the steering angle of the first steering wheel; a first motor group; a second signal acquisition and transceiver device which can receive the steering information output from the first signal acquisition and transceiver device; a rear wheel group; and a second motor group; such that through the aforementioned structure, when the first steering wheel is turned, the first motor group may be controlled by the first steering wheel to drive the front wheel group to turn and in the mean time, the second signal acquisition and transceiver device may receive the steering information and transmit it to the second motor group to drive the rear wheel group. | 11-26-2009 |
Shih-Chieh Chang, Taichung County TW
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20080280063 | Method of coloring patterns or texts on a surface of an aluminum alloy material - In a method of coloring patterns or texts on a surface of an aluminum alloy material, an insulating layer is formed on the surface of the aluminum alloy material, and then the patterns or texts, which are partially insulated and partially conductive, are formed by way of laser engraving. Next, the conductive portion of the patterns or texts is treated by way of electro-deposition coating so that a cladding layer having a color different from that of the aluminum alloy material may be formed on the patterns or texts, different colors may appear, and the flatness of the surface may be kept. | 11-13-2008 |
Shih-Chieh Chang, Hsin-Chu City TW
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20080219083 | Semiconductor memory device and power control method thereof - A semiconductor memory device for saving power consumption and control method thereof are disclosed. The clock frequency on memory chips is dynamically adjusted to match the data transferring rate between the other units in computer system and the memory chips. A fill state of buffer and transferring rate on an input/output interface are detected by a monitor. A frequency adjuster increases or decrease the clock frequency on memory chips for keeping a good transferring rate and saving unnecessary power according to the monitor's detection. | 09-11-2008 |
20080222350 | Flash memory device for storing data and method thereof - A flash memory device which comprises a controller and one or plurality of flash memories for storing data and method thereof are disclosed. The controller comprises a control interface to accept data access which is from a main board and is managed by a control element of flash memory and a buffer management element. Through a micro-processing element in the controller, the data access from main board is checked for a random access or a serial page access. The random access and serial page access are written to different blocks by different processes in one or plurality of flash memories. The lifetime and processing speed of flash memories are improved for reduced erasure times during writing data. | 09-11-2008 |
Shih-Chieh Chang, Lujhou City TW
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20080220673 | MOISTURE-WICKING AND FAST DRYING CLOTH - A moisture-wicking and fast drying cloth has an outer layer and an inner layer. The outer layer is made of hydrophilic synthetic fiber and has multiple meshes. The meshes are defined through the outer layer. The inner layer is made of hydrophobic synthetic fiber and is bonded to the outer layer. The inner layer exposed by the meshes pulls away from a person's skin and protrudes into the meshes when perspiration exceeds evaporating moisture from the outer layer, so area of the inner layer contacting the person's skin will be reduced to make the person comfortable. | 09-11-2008 |
Shih-Chieh Chang, Shanhua Township TW
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20080211106 | VIA/CONTACT AND DAMASCENE STRUCTURES AND MANUFACTURING METHODS THEREOF - A method for forming a semiconductor structure includes forming a dielectric layer over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is then formed and a single polishing operation removes the seed layer and conductive layer. | 09-04-2008 |
20120292768 | VIA/CONTACT AND DAMASCENE STRUCTURES - A semiconductor structure is provided and includes a dielectric layer disposed over a substrate. A first non-conductive barrier layer is formed over the dielectric layer. At least one opening is formed through the first non-conductive barrier layer and within the dielectric layer. A second non-conductive barrier layer is formed over the first non-conductive barrier layer and within the opening. At least a portion of the second non-conductive barrier layer is removed, thereby at least partially exposing a top surface of the first non-conductive barrier layer and a bottom surface of the opening, with the second non-conductive barrier layer remaining on sidewalls of the opening. A seed layer and conductive layer is disposed in the opening. | 11-22-2012 |
Shih-Chieh Chang US
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20110243684 | STEM FASTENING STRUCTURE - A stem fastening structure includes a cap, a bolt and a packing member. The cap abuts against a top of a stem and corresponds to a top edge of a middle hole of a front fork. The bolt passes through the cap and penetrates into the middle hole. The packing member has a loop portion for the bolt screwing therethrough. Two sides of the loop portion extend upward and diverge from the other to form two bottom cone portions. Two positioning portions respectively and vertically extend upward from the two positioning portioning. Two top cone portions respectively extend upward from the two positioning portions, and approach the other. A top of each top cone portions abuts against the cap. Thereby, when the bolt drives the loop portion to move toward the cap, the positioning portions abut against the middle hole, so that the stem is fastened to the front fork. | 10-06-2011 |
20130233119 | TOP CAP OF BICYCLE HANDLEBAR STEM TUBE AND METHOD FOR MANUFACTURING SAME - A top cap is provided for a bicycle handlebar stem. The top cap includes a cap body, which has a lower portion forming a fitting cylinder of a reduced diameter and a radially expanding circumferential shoulder atop the fitting cylinder. A barrel extends from a bottom of the fitting cylinder. The barrel forms a downward-facing hollow blind hole. The cap body forms a bolt head hole extending therethrough and coaxial with and communicating the blind hole. The barrel forms slits, which define a tightening section. | 09-12-2013 |
Shih-Chieh Chang, Chiayi County TW
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20130249070 | SEMICONDUCTOR PACKAGE STRUCTURE - A semiconductor package structure comprises a lead frame, at least one chip, a molding compound and an anti-conduction film. The lead frame comprises a plurality of leads, each of the leads comprises a first end portion and a second end portion, wherein the first end portion comprises a first upper surface and a first lower surface, and the second end portion comprises a second upper surface and a second lower surface. The chip comprises a plurality of bumps electrically connected with the lead frame. The chip and the leads are covered with the molding compound. The first lower surface of each of the first end portions and the second lower surface of each of the second end portions are exposed by the molding compound. The first lower surface of the first end portion of each of the leads is covered with the anti-conduction film. | 09-26-2013 |
20130334671 | SEMICONDUCTOR PACKAGE AND LEAD FRAME THEREOF - A semiconductor package includes a lead frame, at least one chip and a molding compound. The lead frame comprises a plurality of leads, each lead comprises a first end portion and at least one coupling protrusion, wherein the first end portion comprises a first upper surface, the coupling protrusion comprises a ring surface and is integrally formed as one piece with the first upper surface. The chip disposed on top of the leads comprises a plurality of bumps and a plurality of solders, the coupling protrusions embed into the solders to make the ring surfaces of the coupling protrusions cladded with the solders. The solders cover the first upper surfaces. The chip and the leads are cladded with the molding compound. | 12-19-2013 |
20130334681 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME - A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate. | 12-19-2013 |
20140021601 | SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOF - A semiconductor manufacturing method includes providing a carrier; forming a first photoresist layer; forming plural core portions; removing the first photoresist layer; forming a second photoresist layer; forming a plurality of connection portions, each of the plurality of connection portions includes a first connection layer and a second connection layer and connects to each of the core portions to form a hybrid bump, wherein each of the first connection layers comprises a base portion, a projecting portion and an accommodating space, each base portion comprises an upper surface, each projecting portion is protruded to the upper surface and located on top of each core portion, each accommodating space is located outside each projecting portion, the second connection layers cover the projecting portions and the upper surfaces, and the accommodating spaces are filled by the second connection layers; removing the second photoresist layer to reveal the hybrid bumps. | 01-23-2014 |
20140027905 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MAKING THE SAME - A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate. | 01-30-2014 |
20140141606 | SEMICONDUCTOR MANUFACTURING METHOD AND SEMICONDUCTOR STRUCTURE THEREOF - A semiconductor manufacturing method includes providing a carrier; forming a first photoresist layer; forming plural core portions; removing the first photoresist layer; forming a second photoresist layer; forming a plurality of connection portions, each of the plurality of connection portions includes a first connection layer and a second connection layer and connects to each of the core portions to form a hybrid bump, wherein each of the first connection layers comprises a base portion, a projecting portion and an accommodating space, each base portion comprises an upper surface, each projecting portion is protruded to the upper surface and located on top of each core portion, each accommodating space is located outside each projecting portion, the second connection layers cover the projecting portions and the upper surfaces, and the accommodating spaces are filled by the second connection layers; removing the second photoresist layer to reveal the hybrid bumps. | 05-22-2014 |
20140217578 | SEMICONDUCTOR PACKAGE PROCESS AND STRUCTURE THEREOF - A semiconductor package process includes the following steps, providing a first substrate having a first metal bump, the first metal bump comprises a joint portion having a first softening point; providing a second substrate having a second metal bump having a top surface, a lateral surface and a second softening point, wherein the first softening point is smaller than the second softening point; performing a heating procedure to make the joint portion of the first metal bump become a softened state; and laminating the first substrate on the second substrate to make the second metal bump embedded into the joint portion in the softened state to make the top surface and the lateral surface of the at least one second metal bump being clad extendedly by compressing the joint portion in the softened state. | 08-07-2014 |
Shih-Chieh Chang, Kaohsiung City TW
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20150193075 | TOUCH APPARATUS AND TOUCH METHOD THEREOF - A touch apparatus and a touch method thereof are provided. At first, whether the touch apparatus is under the influence of the noise interference is determined according to a plurality of differences between a plurality of sensing values of adjacent touch sensing periods within a recent predetermined period. Then, a touch detection operating frequency of the touch apparatus is adjusted when the touch apparatus is under the influence of noise interference. | 07-09-2015 |
Shih-Chieh Chang, Taipei TW
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20150349250 | RESISTIVE RANDOM-ACCESS MEMORY (RRAM) WITH MULTI-LAYER DEVICE STRUCTURE - A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a multi-layer resistance-switching network disposed between the pair of electrodes. The multi-layer resistance-switching network comprises a pair of carbon doping layers and a group-IV element doping layer disposed between the pair of carbon doping layers. Each carbon doping layer comprises silicon oxide doped with carbon. The group-IV doping layer comprises silicon oxide doped with a group-IV element. A method of fabricating a resistive memory cell is also disclosed. The method comprises forming a first carbon doping layer on a first electrode using sputtering, forming a group-IV element doping layer on the first carbon doping layer using sputtering, forming a second carbon doping layer on the group-IV element doping layer using sputtering, and forming a second electrode on the second carbon doping layer using sputtering. | 12-03-2015 |
20150349251 | RESISTIVE RANDOM-ACCESS MEMORY (RRAM) WITH A LOW-K POROUS LAYER - A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. | 12-03-2015 |