Patent application number | Description | Published |
20090019450 | APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT FOR TASK MANAGEMENT - A task management apparatus comprises a plurality of processors, and correspondingly stores, a plurality of tasks to be assigned to the processors within a predetermined period of time, and temporal groups each of which is assigned to the plurality of the tasks. The task management apparatus assigns one of the tasks to one of the processors. After having assigned the task, the task management apparatus assigns, to the one of the processors that has finished processing the assigned task, the other tasks that are in correspondence with the same temporal group as the temporal group with which the assigned task is in correspondence, before assigning the tasks that are not in correspondence with the temporal group. | 01-15-2009 |
20090019451 | ORDER-RELATION ANALYZING APPARATUS, METHOD, AND COMPUTER PROGRAM PRODUCT THEREOF - An order-relation analyzing apparatus collects assigned destination processor information, a synchronization process order and synchronization information, determines a corresponding element associated with a program among a plurality of elements indicating an ordinal value of the program based on the assigned destination processor information, when an execution of the program is started, and calculates the ordinal value indicated by the corresponding element for each segment based on the synchronization information, when the synchronization process occurs while executing the program. When a first corresponding element associated with a second program, of which the execution starts after the execution of a first program associated with the first corresponding element finishes, is determined, the ordinal value of the second program is calculated by calculating the ordinal value indicated by the first corresponding element. | 01-15-2009 |
20090172458 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND CLOCK CONTROL METHOD - A plurality of operation units connected in a pipeline structure performs an operation processing on data. A process control unit operates in synchronization with a system clock signal and generates a process control signal for controlling the operation units upon receiving a data notification signal that notifies the process control unit of an arrival of data from outside. A clock-control signal generating unit operates in synchronization with the system clock signal and generates a clock control signal for controlling a clock supply to each of the operation units upon receiving the process control signal. | 07-02-2009 |
20090327604 | STORAGE DEVICE, CONTROL DEVICE, STORAGE SYSTEM, AND STORAGE METHOD - A size storage unit stores therein a block size of a memory element. A buffering unit executes buffer processing configured to store data received from a RAID (Redundant Arrays of Inexpensive/Independent Disks) controller into a buffer, and to write the data stored in the buffer into the memory element. A stripe-size receiving unit receives a stripe size that indicates a size of a unit of access at time of access to the memory element by the RAID controller. Writing processing is configured to write data received from the RAID controller into the memory element without executing the buffer processing by the buffering unit, when the stripe size is n times of the block size (n is a positive integer). | 12-31-2009 |
20090327655 | SEMICONDUCTOR DEVICE AND DATA PROCESSING METHOD PERFORMED BY SEMICONDUCTOR DEVICE - The semiconductor device includes a controller and a plurality of dynamically reconfigurable circuits connected to one another in series below the controller to perform operations in the manner of a pipeline. The controller inputs data and reconfiguration information to the first one of the dynamically reconfigurable circuits. Each of the dynamically reconfigurable circuits includes a processing unit that performs a data computation, an updating unit that updates the reconfiguration information, and a repetition controlling unit that determines whether to repeat the computation and controls the data and the reconfiguration information. | 12-31-2009 |
20090327802 | STORAGE CONTROL DEVICE, DATA RECOVERY DEVICE, AND STORAGE SYSTEM - When data in one semiconductor memory device is corrupted during a padding process by a padding unit and the data cannot be recovered even by using an error correcting code for correcting a data error, a storage control device issues a data recovery request to a data recovery device. The data recovery device reads the data from other semiconductor memory device in response to the data recovery request to recover the data, and returns a recovery result to the padding unit in the storage control device to perform the padding process. | 12-31-2009 |
20090327803 | STORAGE CONTROL DEVICE AND STORAGE CONTROL METHOD - A RAID is configured using plural nonvolatile semiconductor memory devices to enable recovery of data stored in the nonvolatile semiconductor memory devices, and data is read from the nonvolatile semiconductor memory device included in the RAID in response to a data reading request inputted from outside. When an error occurs during the reading, data for which the reading error occurs is recovered, and rewritten into an area of the nonvolatile semiconductor memory device in which the reading error occurs. | 12-31-2009 |
20100005228 | DATA CONTROL APPARATUS, STORAGE SYSTEM, AND COMPUTER PROGRAM PRODUCT - A data control apparatus includes a mapping-table managing unit that manages a mapping table that is associated with a corrupted-data recovery function of recording data and error correcting code data as redundant data that is given separately from the data, distributed and stored in units of stripe blocks in the plural nonvolatile semiconductor memory devices, the mapping table containing arrangement information of the data and the error correcting code data; a determining unit that determines whether to differentiate frequencies of writing the data into the semiconductor memory devices; and a changing unit that changes the arrangement information by switching the data stored in units of the stripe blocks managed using the mapping table to differentiate the frequencies of writing the data into the semiconductor memory devices, when the determining unit determines that the frequencies of writing the data into the semiconductor memory devices are to be differentiated. | 01-07-2010 |
20100122071 | SEMICONDUCTOR DEVICE AND DATA PROCESSING METHOD - A semiconductor device includes a first circuit that executes a first calculation, a second circuit that includes a first storage unit therein and executes a second calculation, a controller that outputs a first address for specifying a first execution circuit for the first calculation and a second execution circuit for the second calculation, to the first circuit and the second circuit, and controls input of data into the first circuit, and a bus that transfers a result of the first calculation executed by the first circuit to the second circuit, wherein the result of the first calculation can be conditionally used as an address for specifying the second execution circuit. | 05-13-2010 |
20100161885 | SEMICONDUCTOR STORAGE DEVICE AND STORAGE CONTROLLING METHOD - A semiconductor storage device includes a first storage unit having a plurality of first blocks as data write regions; an instructing unit that issues a write instruction of writing data into the first blocks; a converting unit that converts an external address of input data to a memory position in the first block with reference to a conversion table in which external addresses of the data are associated with the memory positions of the data in the first blocks; and a judging unit that judges whether any of the first blocks store valid data associated with the external address based on the memory positions of the input data, wherein the instructing unit issues the write instruction of writing the data into the first block in which the valid data is not stored, when any of the first blocks does not store the valid data. | 06-24-2010 |
20100223531 | SEMICONDUCTOR STORAGE - A semiconductor storage includes a receiver configured to receive a write request from a host device; a storage unit configured to hold redundancy data generation/non-generation information; a writing unit configured to write data in a semiconductor memory array and write redundancy data generation/non-generation information of the written data in the storage unit; a first data extracting unit configured to extract data whose redundancy data is not generated from among the data held by the semiconductor memory array; a first redundancy data generating unit configured to generate redundancy data; a first redundancy data writing unit configured to write the generated redundancy data in the semiconductor memory array; and a first redundancy data generation/non-generation information updating unit configured to update the redundancy data generation/non-generation information of the data whose redundancy data held by the storage unit is generated. | 09-02-2010 |
20100241819 | CONTROLLER AND MEMORY SYSTEM - A controller includes a storage for a translation table showing logical and physical addresses in a flash memory in correspondence with one another; another storage storing FAT information indicating the state of data stored in each of pages contained in each of blocks and FAT information identifiers each identifying a block to which pages each storing therein the data in the state indicated by the FAT information belong, while keeping them in correspondence with one another; yet another storage for a block management table showing block identifiers, use-state judging information indicating whether the corresponding block is used/unused, and the FAT information identifiers corresponding to all the blocks indicated as being used by the use-state judging information, while keeping them in correspondence with one another; and a controller controlling unit managing data stored in the flash memory by using the translation table, the FAT information, and the block management table. | 09-23-2010 |
20100313084 | SEMICONDUCTOR STORAGE DEVICE - As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value. | 12-09-2010 |
20110016266 | SEMICONDUCTOR DEVICE - On a single semiconductor package PK | 01-20-2011 |
20110060863 | CONTROLLER - A controller stores therein a sector address set indicating logical storage positions within a nonvolatile-memory storage area; page addresses indicating, in units of pages, physical storage positions within the nonvolatile-memory storage area; and pieces of management information each indicating whether one or more special sectors each being either a bad sector or a trimmed sector trimmed by a TRIM command are present in the corresponding page, while associating them with each other. When an access to a specified sector address is requested, the device refers to the piece of management information and judges whether any special sector is present in the page identified by the page address corresponding to the sector address. The device generates predetermined response data if the page contains one or more special sectors and accesses the nonvolatile-memory storage position corresponding to the sector address if the page contains no special sector. | 03-10-2011 |
20110060864 | CONTROLLER AND DATA STORAGE DEVICE - A volatile management memory stores management information for managing a use state of a storage medium. A management information storing unit divides the management information into plural division pieces and individually stores them in the storage medium. A main controller receives a command from a host device while the division pieces are being stored, performs data processing for the storage medium in response to the command between each division piece is stored, updates the management information divided into the division pieces according to the data processing content, and creates a log representing an update content of the management information. A log storing unit stores the log in the storage medium. A restoring unit reads the division pieces stored in the storage medium to the management memory as the management information, updates the management information according to the log stored in the storage medium, and restores the updated management information. | 03-10-2011 |
20110185107 | MEMORY SYSTEM - A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of the data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit has a management information storage area for storing management information storage information including management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of management information in a latest state in the management information storage area and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit. | 07-28-2011 |
20110202578 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device performs writing of data to a semiconductor memory element in response to a request to write the data with a specified logical block address from a host and performs writing of valid data to the semiconductor memory element for compaction according to a log-structured method. The semiconductor memory device adjusts a frequency of the writing response to a request from the host and a frequency of the writing for compaction according to a predetermined ratio. | 08-18-2011 |
20110202812 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 08-18-2011 |
20110214033 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips having writable storage regions in which data is written. The data has one or more pieces of first data, and one or more pieces of the first data includes second data. The device includes a determining unit that determines a prescribed number or fewer of semiconductor memory chips to which the first data is written; a write controller that writes the the first data and redundant information calculated from the second data and used for correcting an error in the second data into the writable storage regions in the determined semiconductor memory chips; and a storage unit that stores identification information and region specifying information associated with each other. The identification information associates the second data and the redundant information, and the region specifying information specifies the storage regions in the semiconductor memory chips to which the first data included in the second data and the redundant information are written. | 09-01-2011 |
20110231624 | CONTROLLER, DATA STORAGE DEVICE, AND PROGRAM PRODUCT - According to one embodiment, a write instructing unit instructs a data access unit to write, in a storage area of a data storage unit indicated by a first physical address, write object data, instructs a management information access unit to update address conversion information, and instructs a first access unit to update the first physical address. A compaction unit extracts a physical address of compaction object data, instructs the data access unit to read the compaction object data stored in a storage area of the data storage unit indicated by the physical address, instructs the data access unit to write the compaction object data in a storage area of the data storage unit indicated by a second physical address, instructs the management information access unit to update the address conversion information, and instructs a second access unit to update the second physical address. | 09-22-2011 |
20120030528 | SEMICONDUCTOR STORAGE DEVICE - As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block selected from the blocks and refreshing data in the monitored block in which the error count is equal to or larger than a threshold value. | 02-02-2012 |
20120072644 | SEMICONDUCTOR MEMORY CONTROLLING DEVICE - According to one embodiment, upon request from an information processor, a semiconductor storage controller writes pieces of data in predetermined units into storage locations in which no data has been written in erased areas within a semiconductor chip's storage area. A third table and a second table which is a subset thereof include physical addresses each indicating a storage location of each of pieces of the data within the semiconductor chip. The first table includes either information specifying a second table entry or information specifying a third table entry. The semiconductor storage controller records the first and the second tables into a volatile memory or records the first table into a volatile memory and the third table into a nonvolatile memory. | 03-22-2012 |
20120072680 | SEMICONDUCTOR MEMORY CONTROLLING DEVICE - According to one embodiment, a semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information. | 03-22-2012 |
20120072795 | SEMICONDUCTOR MEMORY DEVICE AND CONTROLLING METHOD - According to one embodiment, a semiconductor memory device includes a plurality of semiconductor memory chips configured to store therein information depending on an amount of accumulated charge; a plurality of parameter storage units that are provided in correspondence with the semiconductor memory chips, each of the plurality of parameter storage units being configured to store therein a parameter that defines an electrical characteristic of a signal used for writing information into or reading information from a corresponding one of the semiconductor memory chips; an error correction encoding unit configured to generate a first correction code capable of correcting an error in the information stored in a number of semiconductor memory chips no greater than a predetermined number out of the semiconductor memory chips, from the information stored in the semiconductor memory chips; and a parameter processing unit configured to change the parameters respectively corresponding to the number of semiconductor memory chips no greater than the predetermined number, and writes the parameters changed into the parameter storage units, respectively. | 03-22-2012 |
20120072811 | CONTROLLER, STORAGE APPARATUS, AND COMPUTER PROGRAM PRODUCT - According to one embodiment, a controller controls writing into and reading from a storage apparatus that includes a first data-storage unit and a second data-storage unit. The second data-storage unit stores user data and parity data of the user data. The first data-storage unit stores the parity data. The controller includes a parity updating unit and a parity writing unit. When parity data is updated, the parity updating unit writes the updated parity data into the first data-storage unit. When a certain requirement is satisfied, the parity writing unit reads the parity data written in the first data-storage unit, and writes the parity data thus read into the second data-storage unit. | 03-22-2012 |
20120226957 | CONTROLLER, DATA STORAGE DEVICE AND PROGRAM PRODUCT - According to an embodiment of a controller, a bit string manipulating unit manipulates a bit string of manipulation target data based on a predetermined rule. A special data setting unit generates a magic number based on a special data setting request from a host interface, obtains an error detecting code for the magic number, and sends the magic number and the error detecting code as manipulation target data to the bit string manipulating unit to obtain a manipulated manipulation target data. The special data setting unit also extracts logical block address information from the special data setting request, and instructs an access unit to write the magic number in the manipulated manipulation target data to a user data storage area and to write the error detecting code in the manipulated manipulation target data to a redundant area in a storage area located by the logical block address information. | 09-06-2012 |
20120239992 | METHOD OF CONTROLLING A SEMICONDUCTOR STORAGE DEVICE - A method of controlling a nonvolatile semiconductor memory including a plurality of blocks, each one of the plurality of blocks being a unit of data erasing, includes determining a monitored block as a candidate for refresh operation from among the plurality of blocks based on a predetermined condition. The method includes monitoring an error count of data stored in the monitored block and not monitoring an error count of data stored in blocks excluding the monitored block among the plurality of blocks. The method also includes performing the refresh operation on data stored in the monitored block in which the error count is larger than a first threshold value. | 09-20-2012 |
20120246383 | MEMORY SYSTEM AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a memory system includes semiconductor memories each having a plurality of blocks; a first table; a receiving unit; a generating unit; a second table; and a writing unit. The first table includes a plurality of memory areas each associated with each block and in each of which defect information is stored. The generating unit generates a set of blocks by selecting one block to which data are to be written in each semiconductor memory based on an index number indicating one of a plurality of rows in the first table and the first table. In the second table, an index number and a channel number are stored for each logical block address in association with one another. When a write command is received by the receiving unit, the writing unit writes data to a block associated with a selected channel number among blocks constituting the set. | 09-27-2012 |
20130024488 | SEMICONDUCTOR DEVICE - According to an embodiment, a semiconductor device includes an arithmetic device that includes a first storage unit that stores first device-control information for deciding an arithmetic processing to be executed next to an arithmetic processing currently being executed by an arithmetic device and a timing at which the arithmetic processing to be executed next to the arithmetic processing currently being executed by the arithmetic device is executed; and the arithmetic device that includes a second storage unit that stores second device-control information for deciding a content of an operation contained in an arithmetic processing. The control device reads out the first device-control information, and determines whether a decision start condition defined for each arithmetic processing is satisfied by using the first device-control information, the decision start condition being a condition on which the arithmetic processing to be executed next to the arithmetic processing currently being executed is decided. | 01-24-2013 |
20130077419 | DATA GENERATION APPARATUS - An apparatus according to an embodiment comprises a first storage, a second storage, an input unit, a shift number determining unit, and an output unit. The first storage stores identification information of sectors and defective information indicating a presence of defect on the data line, while associating the identification information and the defective information. The second storage has storage regions in a number larger than the first number. The input unit inputs data to the second storage by the first number at a time. The shift number determining unit determines a shift number. The output unit outputs the data stored in the storage regions which is after a head storage region by the shift number, as the data is to be supplied to the data line having no defect sector based upon the defective information, and outputs information that differs from the data to the defective data line. | 03-28-2013 |
20130232391 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 09-05-2013 |
20130238838 | CONTROLLER, STORAGE DEVICE, AND COMPUTER PROGRAM PRODUCT - According to an embodiment, a controller is connected to an external storage device and controls access to a semiconductor storage device including blocks each including memory cell groups each having memory cells. The block includes pages associated with each memory cell group. A writing process for each memory cell group includes writing stages. The controller includes a determining unit configured to determine data to be transferred to the page required in the writing process for a first memory cell group before the writing stage first starts when the writing stage is performed; a reading unit configured to read the determined data from the semiconductor storage device and to store the read data in the external storage device before the writing stage starts; and a writing unit configured to perform the writing process using the data stored in the external storage device when the writing stage is performed. | 09-12-2013 |
20130290659 | MEMORY SYSTEM - A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit stores management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of the management information in a latest state and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit. | 10-31-2013 |
20140006851 | SEMICONDUCTOR MEMORY CONTROLLING DEVICE | 01-02-2014 |
20140040664 | METHOD OF CONTROLLING A SEMICONDUCTOR STORAGE DEVICE - A method of controlling a nonvolatile semiconductor memory includes patrolling a first pool including a plurality of blocks/units with a first frequency, and when a first block/unit in the first pool satisfies a first condition, assigning the first block/unit to a second pool. The method includes patrolling the second pool with a second frequency, the second frequency being higher than the first frequency, and when a second block/unit in the second pool satisfies a second condition, moving data stored in the second block/unit to a free block/unit. | 02-06-2014 |
20140082345 | SEMICONDUCTOR DEVICE - On a single semiconductor package PK | 03-20-2014 |
20140208013 | MEMORY SYSTEM - A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of the data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit has a management information storage area for storing management information storage information including management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of management information in a latest state in the management information storage area and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit. | 07-24-2014 |
20140304567 | METHOD OF CONTROLLING A SEMICONDUCTOR STORAGE DEVICE - A method of controlling a nonvolatile semiconductor memory includes checking a first group at a first interval period, the first group including a plurality of blocks, and when a first block in the first group satisfies a first condition, assigning the first block to a second group. The method includes checking, at a second interval period, an error count of data stored in the second group, and when a second block in the second group satisfies a second condition, moving data stored in the second block to an erased block in which stored data is erased among the plurality of blocks. | 10-09-2014 |
20140310575 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 10-16-2014 |
20140310576 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written. | 10-16-2014 |