Patent application number | Description | Published |
20090147247 | Defect detecting apparatus and defect detecting method - A defect inspecting apparatus inspects defects of a sample having a pattern formed on the surface. The defect inspecting apparatus is provided with a stage which has a sample placed thereon and linearly moves and turns; a light source; an illuminating optical system, which selects a discretionary wavelength region from the light source and epi-illuminates the sample surface through a polarizer and an objective lens; a detecting optical system, which obtains a pupil image, by passing through reflection light applied by the illuminating optical system from the surface of the sample through the objective lens and an analyzer which satisfies the cross-nichols conditions with the polarizer; and a detecting section which detects defects of the sample by comparing the obtained pupil image with a previously stored pupil image. Conformity of the pattern on a substrate to be inspected can be judged in a short time. | 06-11-2009 |
20090201579 | Microscope device and resolution method of microscope image - To provide a microscope device capable of resolving a microscopic pattern beyond optical resolution of the microscope device. | 08-13-2009 |
20090251691 | Liquid Immersion Microscope - To provide a liquid immersion microscope device enabling nondestructive liquid immersion observation of a substrate without deteriorating quality of the substrate. To attain this, a liquid immersion microscope device of the present invention includes a supporting unit supporting a substrate as an observation target, an objective lens of a liquid immersion type, a first supplying unit supplying ultrapure water as a liquid for observation to a gap between a tip of the objective lens and the substrate, a first draining unit draining the liquid for observation after observation of the substrate, a second supplying unit supplying a liquid for cleaning, which is different from the liquid for observation drained by the first draining unit, to an area, of the substrate, that has been in contact with the liquid for observation, and a second draining unit draining the liquid for cleaning after the substrate is cleaned. | 10-08-2009 |
Patent application number | Description | Published |
20080266965 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING PLURAL DATA STORAGE PORTIONS FOR A BIT LINE CONNECTED TO MEMORY CELLS - Data having three values or more is stored in a memory cell in a nonvolatile manner. A data circuit has a plurality of storage circuits. One of the plurality of storage circuits is a latch circuit. Another one of the plurality of storage circuits is a capacitor. The latch circuit and the capacitor function to temporarily store program/read data having two bits or more. Data held by the capacitor is refreshed using the latch circuit if data variation due to leakage causes a program. As a result, the data circuit does not become large in size even if multi-level data is used. | 10-30-2008 |
20090164712 | FLASH MEMORY - A flash memory includes a memory sector, a command interface, a first signal buffer, a control signal generation circuit, a data input buffer, an error correction circuit, an address buffer, an address signal generation circuit, a plurality of data memory circuits, and write circuit. The command interface receives a write data input instruction from an external device to generate a write data input instruction signal, and receives a write instruction from the external device to generate a write instruction signal. The error correction circuit is activated by the write data input instruction signal to receive the write data in synchronization with the write enable signal, and is activated by the write instruction signal to generate a check data for an error correction in synchronization with the control signal. | 06-25-2009 |
20090323416 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING PLURAL DATA STORAGE PORTIONS FOR A BIT LINE CONNECTED TO MEMORY CELLS - Data having three values or more is stored in a memory cell in a nonvolatile manner. A data circuit has a plurality of storage circuits. One of the plurality of storage circuits is a latch circuit. Another one of the plurality of storage circuits is a capacitor. The latch circuit and the capacitor function to temporarily store program/read data having two bits or more. Data held by the capacitor is refreshed using the latch circuit if data variation due to leakage causes a program. As a result, the data circuit does not become large in size even if multi-level data is used. | 12-31-2009 |
20100027333 | Nonvolatile Semiconductor Memory Device - A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area. | 02-04-2010 |
20110096598 | NONVOLATILE SEMICONDUCTOR MEMORY HAVING PLURAL DATA STORAGE PORTIONS FOR A BIT LINE CONNECTED TO MEMORY CELLS - Data having three values or more is stored in a memory cell in a nonvolatile manner. A data circuit has a plurality of storage circuits. One of the plurality of storage circuits is a latch circuit. Another one of the plurality of storage circuits is a capacitor. The latch circuit and the capacitor function to temporarily store program/read data having two bits or more. Data held by the capacitor is refreshed using the latch circuit if data variation due to leakage causes a program. As a result, the data circuit does not become large in size even if multi-level data is used. | 04-28-2011 |
20110116315 | Nonvolatile Semiconductor Memory Device - A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area. | 05-19-2011 |
20110167320 | FLASH MEMORY - A flash memory includes a memory sector, a command interface, a first signal buffer, a control signal generation circuit, a data input buffer, an error correction circuit, an address buffer, an address signal generation circuit, a plurality of data memory circuits, and write circuit. The command interface receives a write data input instruction from an external device to generate a write data input instruction signal, and receives a write instruction from the external device to generate a write instruction signal. The error correction circuit is activated by the write data input instruction signal to receive the write data in synchronization with the write enable signal, and is activated by the write instruction signal to generate a check data for an error correction in synchronization with the control signal. | 07-07-2011 |
20120224422 | Nonvolatile Semiconductor Memory Device - A memory cell array has a first and a second storage area. The first storage area has a memory elements selected by an address signal. The second storage area has a memory elements selected by a control signal. A control circuit has a fuse element. When the fuse element has been blown, the control circuit inhibits at least one of writing and erasing from being done on the second storage area. | 09-06-2012 |
20130097473 | FLASH MEMORY - A flash memory includes a memory sector, a command interface, a first signal buffer, a control signal generation circuit, a data input buffer, an error correction circuit, an address buffer, an address signal generation circuit, a plurality of data memory circuits, and write circuit. The command interface receives a write data input instruction from an external device to generate a write data input instruction signal, and receives a write instruction from the external device to generate a write instruction signal. The error correction circuit is activated by the write data input instruction signal to receive the write data in synchronization with the write enable signal, and is activated by the write instruction signal to generate a check data for an error correction in synchronization with the control signal. | 04-18-2013 |
Patent application number | Description | Published |
20090034100 | OPTICAL SYSTEM, IMAGING APPARATUS, AND METHOD FOR FORMING IMAGE BY THE OPTICAL SYSTEM - Providing an optical system having excellent optical performance, an imaging apparatus, and a method for forming an image by the optical system. The optical system includes, in order from an object, a first lens group G | 02-05-2009 |
20090052051 | OPTICAL SYSTEM, IMAGING APPARATUS, AND METHOD FOR FORMING IMAGE BY THE OPTICAL SYSTEM - Providing an optical system having excellent optical performance with sufficiently correcting spherical aberration and curvature of field, an imaging apparatus, and a method for forming an image by the optical system. The optical system includes a plurality of lens groups, at least one of the plurality of lens groups having an A lens that satisfies at least one of given conditional expressions. | 02-26-2009 |
20100188755 | ZOOM LENS SYSTEM, IMAGING APPARATUS, AND METHOD FOR MANUFACTURING ZOOM LENS SYSTEM - A zoom lens system including, in order from an object, a first lens group G | 07-29-2010 |
20110109977 | OPTICAL SYSTEM, IMAGING APPARATUS, AND METHOD FOR FORMING IMAGE BY THE OPTICAL SYSTEM - Providing an optical system having excellent optical performance with sufficiently correcting spherical aberration and curvature of field, an imaging apparatus, and a method for forming an image by the optical system. The optical system includes a plurality of lens groups, at least one of the plurality of lens groups having an A lens that satisfies at least one of given conditional expressions. | 05-12-2011 |
20110194191 | ZOOM LENS SYSTEM, IMAGING APPARATUS, AND METHOD FOR ZOOMING THE ZOOM LENS SYSTEM - Providing a zoom lens system having excellent optical performance with a high zoom ratio, an imaging apparatus, and a method for zooming the zoom lens system. The system including, in order from an object, a first group G | 08-11-2011 |
20120275032 | ZOOM LENS SYSTEM, IMAGING APPARATUS, AND METHOD FOR ZOOMING THE ZOOM LENS SYSTEM - Providing a zoom lens system having excellent optical performance with a high zoom ratio, an imaging apparatus, and a method for zooming the zoom lens system. The system including, in order from an object, a first group G | 11-01-2012 |
20140029111 | OPTICAL SYSTEM, IMAGING APPARATUS AND METHOD FOR MANUFACTURING THE OPTICAL SYSTEM - An optical system comprises a first lens element and a second lens element which are respectively shiftable to have a component in a direction perpendicular to the optical axis, the second lens element being composed of the first lens element and other lens element, and the first lens element or the second lens element being shifted to have a component in a direction perpendicular to the optical axis, thereby carrying out a correction of the image plane. Thus, there are provided an optical system having a suitable vibration reduction property, an image apparatus equipped with the optical system and a method for manufacturing the optical system. | 01-30-2014 |
20140085732 | ZOOM LENS SYSTEM, IMAGING APPARATUS, AND METHOD FOR ZOOMING THE ZOOM LENS SYSTEM - Providing a zoom lens system having excellent optical performance with a high zoom ratio, an imaging apparatus, and a method for zooming the zoom lens system. The system including, in order from an object, a first group G | 03-27-2014 |
Patent application number | Description | Published |
20110175105 | SEMICONDUCTOR LIGHT-EMITTING DEVICE AND FABRICATION METHOD THEREOF - A plurality of protrusions is formed on the C-plane substrate with a corundum structure. A base film made of a III-V compound semiconductor including Ga and N is formed on the surface of the substrate. The surface of the base film is flatter than the surface of the substrate. A light emitting structure including Ga and N is disposed on the base film. The protrusions are regularly arranged in a first direction that is tilted by less than 15 degrees with respect to the a-axis of the base film and in a second direction that is orthogonal to the first direction. Each protrusion has two first parallel sides tilted by less than 15 degrees relative to an m-axis and two second parallel sides tilted by less than 15 degrees relative to the a-axis. An interval between the two second sides is wider than an interval between the two first sides. | 07-21-2011 |
20120231568 | SEMICONDUCTOR DEVICE PRODUCTION PROCESS - (a) On a growth substrate, a void-containing layer that is made of a group III nitride compound semiconductor and contains voids is formed. (b) On the void-containing layer, an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids is formed. (c) On the n-type layer, an active layer made of a group III nitride compound semiconductor is formed. (d) On the active layer, a p-type layer made of a p-type group III nitride compound semiconductor is formed. (e) A support substrate is bonded above the p-type layer. (f) The growth substrate is peeled off at the boundary where the voids are produced. In the above step (a) or (b), the supply of at least part of the materials that form the layer is decreased, while heating, before the voids are closed. | 09-13-2012 |
20120231608 | PRODUCTION PROCESS FOR SEMICONDUCTOR DEVICE - (a) Forming on a growth substrate a void-containing layer that is made of a group III nitride compound semiconductor and contains voids. (b) Forming on the void-containing layer an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids. (c) Forming on the n-type layer an active layer made of a group III nitride compound semiconductor. (d) Forming on the active layer a p-type layer made of a p-type group III nitride compound semiconductor. (e) Bonding a support substrate above the p-type layer. (f) Peeling off the growth substrate at the boundary where the void are produced. (g) Planarizing the n-type layer. Step (b) comprises (b1) forming part of the n-type layer under conditions where horizontal growth is relatively weak and (b2) forming the remaining part of the n-type layer under conditions where horizontal growth is relatively strong. | 09-13-2012 |
20140319534 | SEMICONDUCTOR LIGHT EMITTING ELEMENT - A semiconductor light emitting element comprises an optical semiconductor laminated layer providing vias, an electrode that is disposed on a surface of the optical semiconductor laminated layer and separated from the second semiconductor layer in a peripheral portion of the electrode, a first transparent insulating layer that is disposed between the peripheral portion of the electrode and the optical semiconductor laminated layer, and a second transparent insulating layer that is disposed to cover the electrode, that envelops the peripheral portion of the electrode together with the first transparent insulating layer. | 10-30-2014 |