Patent application number | Description | Published |
20100238937 | HIGH SPEED PACKET FIFO INPUT BUFFERS FOR SWITCH FABRIC WITH SPEEDUP AND RETRANSMIT - Described embodiments provide a first-in, first-out (FIFO) buffer for packet switching in a crossbar switch with a speedup factor of m. The FIFO buffer comprises a plurality of registers configured to receive N-bit portions of data in packets and a plurality of one-port memories, each having width W segmented into S portions a width W/S. A first logic module is coupled to the registers and the one-port memories and receives the N-bit portions of data in and the outputs of the registers. A second logic module coupled to the one-port memories constructs data out read from the one-port memories. In a sequence of clock cycles, the N-bit data portions are alternately transferred from the first logic module to a segment of the one-port memories, and, for each clock cycle, the second logic module constructs the data out packet with output width based on the speedup factor of m. | 09-23-2010 |
20100238938 | HIGH SPEED PACKET FIFO OUTPUT BUFFERS FOR SWITCH FABRIC WITH SPEEDUP - Described embodiments provide a first-in, first-out (FIFO) buffer for packet switching in a crossbar switch with a speedup factor of m. The FIFO buffer comprises a first logic module that receives m N-bit data portions from a switch fabric, the m N-bit data portions comprising one or more N-bit data words of one or more data packets. A plurality of one-port memories store the received data portions. Each one-port memory has a width W segmented into S portions of width W/S, where W/S is related to N. A second logic module provides one or more N-bit data words, from the one-port memories, corresponding to the received m N-bit data portions. In a sequence of clock cycles, the data portions are alternately transferred from corresponding segments of the one-port memories in a round-robin fashion, and, for each clock cycle, the second logic module constructs data out read from the one-port memories. | 09-23-2010 |
20110075257 | 3-Dimensional electro-optical see-through displays - An exemplary display is placed in an optical pathway extending from an entrance pupil of a person's eye to a real-world scene beyond the eye. The display includes at least one 2-D added-image source that is addressable to produce a light pattern corresponding to a virtual object. The source is situated to direct the light pattern toward the person's eye to superimpose the virtual object on an image of the real-world scene as perceived by the eye via the optical pathway. An active-optical element is situated between the eye and the added-image source at a location that is optically conjugate to the entrance pupil and at which the active-optical element forms an intermediate image of the light pattern from the added-image source. The active-optical element has variable optical power and is addressable to change its optical power to produce a corresponding change in perceived distance at which the intermediate image is formed, as an added image to the real-world scene, relative to the eye. | 03-31-2011 |
20140204623 | CHARGING CIRCUIT FOR A POWER CONVERTER CONTROLLER - A controller includes a first controller terminal, a second controller terminal, a first p-channel metal-oxide-semiconductor field-effect transistor, and a second pMOS transistor. The first controller terminal is to be coupled to a bypass capacitor coupled to a secondary side of an isolated power converter. The second controller terminal to be coupled to an output node of the secondary side. The first pMOS transistor includes a first source terminal coupled to the second controller terminal, a first drain terminal, and a first body diode. The second pMOS transistor includes a second source terminal coupled to the first controller terminal, a second drain terminal coupled to the first drain terminal, and a second body diode. A cathode of the second body diode is coupled to the second source terminal. An anode of the second body diode is coupled to the second drain terminal. | 07-24-2014 |
20140204624 | POWER CONVERTER CONTROLLER WITH MULTIPLE POWER SOURCES - A controller includes a bypass terminal, a first power circuit, a second power circuit, and a charging control circuit. The bypass terminal is to be coupled to a bypass capacitor coupled to a secondary side of an isolated power converter. The first power circuit is coupled to the bypass terminal and a first terminal to be coupled to a first node of the secondary side. The first power circuit transfers charge from the first terminal to the bypass terminal for storage on the bypass capacitor. The second power circuit is coupled to the bypass terminal and a second terminal to be coupled to a second node of the secondary side. The second power circuit transfers charge from the second terminal to the bypass terminal for storage on the bypass capacitor. The charging control circuit controls which of the first and second power circuits transfers charge to the bypass terminal. | 07-24-2014 |
20140204625 | SECONDARY CONTROLLER FOR USE IN SYNCHRONOUS FLYBACK CONVERTER - A secondary controller for use in a synchronous flyback converter includes a comparator, a drive circuit, and logic circuitry. The comparator is coupled to generate a compare signal in response to a comparison of a threshold to an input signal representative of a secondary winding voltage of the synchronous flyback converter. The drive circuit is coupled to generate a drive signal to control a first switch to be coupled to a primary side of the synchronous flyback converter. The drive signal is coupled to be generated by the drive circuit in response to a feedback signal representative of an output of the synchronous flyback converter. The logic circuitry is coupled to the drive circuit and coupled to the comparator. The logic circuitry is also coupled to generate a control signal to control a second switch in response to the drive signal and in response to the compare signal. | 07-24-2014 |
20140204626 | RECEIVE CIRCUIT FOR USE IN A POWER CONVERTER - A receive circuit for use in a power converter controller includes a first amplifier coupled to receive an input pulse. A second amplifier is coupled to a first output of the first amplifier. The first output is coupled to be responsive to the input pulse and to a second output of the second amplifier. An output circuit is coupled to generate an output signal in response to the second output. | 07-24-2014 |
20140254214 | TECHNIQUES FOR CONTROLLING A POWER CONVERTER USING MULTIPLE CONTROLLERS - A power converter controller includes a primary controller that is galvanically isolated from a secondary controller. The primary controller controls a state of a power switch during a first mode of operation according to a switching pattern defined by the primary controller. During a second mode of operation, the primary controller controls the state of the power switch in response to control signals received via a communication link. The secondary controller operates in a powered down state during the first mode of operation. The secondary controller initiates a transition operation with the primary controller that transitions the primary controller and the secondary controller from the first mode of operation to the second mode of operation. In the second mode of operation, the secondary controller transmit the control signals to the primary controller via the communication link. | 09-11-2014 |