Patent application number | Description | Published |
20090081826 | PROCESS FOR MAKING DOPED ZINC OXIDE - The present invention relates to a process of making a zinc-oxide-based thin film semiconductor, for use in a transistor, comprising thin film deposition onto a substrate comprising providing a plurality of gaseous materials comprising first, second, and third gaseous materials, wherein the first gaseous material is a zinc-containing volatile material and the second gaseous material is reactive therewith such that when one of the first or second gaseous materials are on the surface of the substrate the other of the first or second gaseous materials will react to deposit a layer of material on the substrate, wherein the third gaseous material is inert and wherein a volatile indium-containing compound is introduced into the first reactive gaseous material or a supplemental gaseous material. | 03-26-2009 |
20090081842 | PROCESS FOR ATOMIC LAYER DEPOSITION - The present invention relates to a process of making thin film electronic components and devices, such as thin film transistors, environmental barrier layers, capacitors, insulators and bus lines, where most or all of the layers are made by an atmospheric atomic layer deposition process. | 03-26-2009 |
20090261323 | N,N'-DI(ARYLALKYL)-SUBSTITUTED NAPHTHALENE-BASED TETRACARBOXYLIC DIIMIDE COMPOUNDS AS N-TYPE SEMICONDUCTOR MATERIALS FOR THIN FILM TRANSISTORS - A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide naphthalene-based compound having, attached to each of the imide nitrogen atoms, a substituted or unsubstituted arylalkyl moiety. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating an organic thin-film transistor device, preferably by sublimation deposition onto a substrate, wherein the substrate temperature is no more than 100° C. | 10-22-2009 |
20090312553 | N-TYPE SEMICONDUCTOR MATERIALS FOR THIN FILM TRANSISTORS - A thin film transistor comprises a layer of organic semiconductor material comprising a tetracarboxylic diimide naphthalene-based compound having, attached to each of the imide nitrogen atoms, an aromatic moiety, at least one of which moieties is substituted with at least one electron donating group. Such transistors can further comprise spaced apart first and second contact means or electrodes in contact with said material. Further disclosed is a process for fabricating an organic thin-film transistor device, preferably by sublimation deposition onto a substrate, wherein the substrate temperature is no more than 100° C. | 12-17-2009 |
20100248423 | DELIVERY DEVICE COMPRISING GAS DIFFUSER FOR THIN FILM DEPOSITION - A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film deposition system toward the surface of a substrate, and wherein the series of gas flows comprises at least a first reactive gaseous material, an inert purge gas, and a second reactive gaseous material, wherein the first reactive gaseous material is capable of reacting with a substrate surface treated with the second reactive gaseous material. A system capable of carrying out such a process is also disclosed. | 09-30-2010 |
20110097489 | DISTRIBUTION MANIFOLD INCLUDING MULTIPLE FLUID COMMUNICATION PORTS - A fluid conveyance device for thin film material deposition includes a fluid distribution manifold, a primary chamber, and a secondary fluid source. The fluid distribution manifold includes an output face that is connected in fluid communication to the primary chamber. The secondary fluid source is connected in fluid communication to the primary chamber through a plurality of conveyance ports. | 04-28-2011 |
20110210783 | TRANSISTOR INCLUDING REENTRANT PROFILE - A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile. | 09-01-2011 |
20120175614 | TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. A third electrically conductive material layer is in contact with and positioned on the second electrically conductive material layer. The third electrically conductive material layer overhangs the second electrically conductive material layer. | 07-12-2012 |
20120175623 | TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer includes a reentrant profile. The second electrically conductive material layer also overhangs the first electrically conductive material layer. | 07-12-2012 |
20120175684 | TRANSISTOR INCLUDING REDUCED CHANNEL LENGTH - A transistor includes a substrate. A first electrically conductive material layer, having a thickness, is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer overhangs the first electrically conductive material layer. An electrically insulating material layer, having a thickness, is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. The thickness of the first electrically conductive material layer is greater than the thickness of the electrically insulating material layer. | 07-12-2012 |
20120176181 | ACTUATING TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A method of actuating a semiconductor device includes providing a transistor. The transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. The second electrically conductive material layer includes a reentrant profile. The second electrically conductive material layer also overhangs the first electrically conductive material layer. An electrically insulating material layer is conformally positioned over the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. A semiconductor material layer conforms to and is in contact with the electrically insulating material layer. A third electrically conductive material layer is nonconformally positioned over and in contact with a first portion of the semiconductor material layer. A fourth electrically conductive material layer is nonconformally positioned over and in contact with a second portion of the semiconductor material layer. A voltage is applied between the third electrically conductive material layer and the fourth electrically conductive material layer. A voltage is applied to the first electrically conductive material layer to electrically connect the third electrically conductive material layer and the fourth electrically conductive material layer. | 07-12-2012 |
20120176182 | ACTUATING TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A method of actuating a semiconductor device includes providing a transistor. The transistor includes a substrate. A first electrically conductive material layer is positioned on the substrate. A second electrically conductive material layer is in contact with and positioned on the first electrically conductive material layer. A third electrically conductive material layer is in contact with and positioned on the second electrically conductive material layer. The third electrically conductive material layer overhangs the second electrically conductive material layer. An electrically insulating material layer is conformally positioned over the third electrically conductive material layer, the second electrically conductive material layer, the first electrically conductive material layer, and at least a portion of the substrate. A semiconductor material layer conforms to and is in contact with the electrically insulating material layer. A fourth electrically conductive material layer is in contact with the semiconductor material layer. A fifth electrically conductive material layer is in contact with the semiconductor material layer. A voltage is applied between the fourth electrically conductive material layer and the fifth electrically conductive material layer. A voltage is applied to the first electrically conductive material layer to electrically connect the fourth electrically conductive material layer and the fifth electrically conductive material layer. | 07-12-2012 |
20120178225 | PRODUCING TRANSISTOR INCLUDING REDUCED CHANNEL LENGTH - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer and a second electrically conductive material layer. The first electrically conductive material layer has a thickness. A resist material layer is deposited over the second electrically conductive material layer. The resist material layer is patterned to expose a portion of the second electrically conductive material layer. Some of the second electrically conductive material layer is removed to expose a portion of the first electrically conductive material layer. The second electrically conductive material layer is caused to overhang the first electrically conductive material layer by removing some of the first electrically conductive material layer. The second electrically conductive material layer, the first conductive material layer, and at least a portion of the substrate are conformally coated with an electrically insulating material layer having a thickness such that the thickness of the first conductive material layer is greater than the thickness of the electrically insulating material layer. | 07-12-2012 |
20120178246 | PRODUCING TRANSISTOR INCLUDING MULTIPLE REENTRANT PROFILES - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer and a second electrically conductive material layer. A resist material layer is deposited over the second electrically conductive material layer. The resist material layer is patterned to expose a portion of the second electrically conductive material layer. Some of the second electrically conductive material layer is removed to create a reentrant profile in the second electrically conductive material layer and to expose a portion of the first electrically conductive material layer. The second electrically conductive material layer is caused to overhang the first electrically conductive material layer by removing some of the first electrically conductive material layer. | 07-12-2012 |
20120178247 | PRODUCING TRANSISTOR INCLUDING MULTI-LAYER REENTRANT PROFILE - A method of producing a transistor includes providing a substrate including in order a first electrically conductive material layer, a second electrically conductive material layer, and a third electrically conductive material layer. A resist material layer is deposited over the third electrically conductive material layer. The resist material layer is patterned to expose a portion of the third electrically conductive material layer. Some of the third electrically conductive material layer is removed to expose a portion of the second electrically conductive material layer. The third electrically conductive material layer is caused to overhang the second electrically conductive material layer by removing some of the second electrically conductive material layer. Some of the first electrically conductive material layer is removed. | 07-12-2012 |
20130052832 | PRODUCING TRANSISTOR INCLUDING SINGLE LAYER REENTRANT PROFILE - A method of producing a transistor includes providing a substrate including a first electrically conductive material layer. A resist material layer is deposited over the first electrically conductive material layer. The resist material layer is patterned to expose a portion of the first electrically conductive material layer. Some of the first electrically conductive material layer is removed to create a reentrant profile in the first electrically conductive material layer and expose a portion of the substrate. The first electrically conductive material layer and at least a portion of the substrate are conformally coated with an electrically insulating material layer. | 02-28-2013 |
20130082746 | VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE - A transistor includes a substrate and an electrically conductive material layer stack positioned on the substrate. The electrically conductive material layer stack includes a reentrant profile. A first electrically insulating material layer positioned is in contact with a first portion of the electrically conductive material layer stack. A second electrically insulating material layer is conformally positioned in contact with the first electrically insulating layer, and conformally positioned in contact with a second portion of the electrically conductive material layer stack, and conformally positioned in contact with at least a portion of the substrate. | 04-04-2013 |
20130084681 | PRODUCING A VERTICAL TRANSISTOR INCLUDING REENTRANT PROFILE - Producing a vertical transistor includes providing a substrate including a gate material layer stack with a reentrant profile. A patterned deposition inhibiting material is deposited over a portion of the gate material layer stack and over a portion of the substrate. An electrically insulating material layer is deposited over a portion of the gate material layer stack and over a portion of the substrate using a selective area deposition process in which the electrically insulating material layer is not deposited over the patterned deposition inhibiting material. A semiconductor material layer is deposited over the electrically insulating material layer. | 04-04-2013 |
20130084692 | PRODUCING VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE - A method of producing a transistor includes providing a substrate including an electrically conductive material layer stack positioned on the substrate. A first electrically insulating material layer is deposited so that the first electrically insulating material layer contacts a first portion of the electrically conductive material layer stack. A second electrically insulating material layer is conformally deposited so that the second electrically insulating material contacts the first electrically insulating layer, and contacts a second portion of the electrically conductive material layer stack, and contacts at least a portion of the substrate. | 04-04-2013 |
20130100183 | VISCOSITY MODULATED DUAL FEED CONTINUOUS LIQUID EJECTOR - A continuous liquid ejector includes a structure including a wall. A portion of the wall defines a nozzle having a first fluidic resistance R | 04-25-2013 |
20130214347 | CIRCUIT INCLUDING VERTICAL TRANSISTORS - An electrical circuit includes a first transistor and a second transistor. Each transistor includes a substrate and a first electrically conductive material layer stack positioned on the substrate. The first electrically conductive material layer stack includes a reentrant profile. A second electrically conductive material layer includes first and second discrete portions in contact with first and second portions of a semiconductor material layer that conforms to the reentrant profile and is in contact with the electrically insulating material layer that conforms to the reentrant profile. A third electrically conductive material layer is in contact with a third portion of the semiconductor material layer and is positioned over the first electrically conductive material layer stack but is not in electrical contact with the first electrically conductive material layer stack. The third electrically conductive material layer of the first transistor and the second transistor are physically separate from each other. | 08-22-2013 |
20130214845 | VERTICAL TRANSISTOR ACTUATION - A method of actuating a semiconductor device includes providing a transistor including a substrate and a first electrically conductive material layer stack positioned on the substrate. The first electrically conductive material layer stack includes a reentrant profile. A second electrically conductive material layer includes first and second discrete portions in contact with first and second portions of a semiconductor material layer that conforms to the reentrant profile and is in contact with an electrically insulating material layer that conforms to the reentrant profile. A voltage is applied between the first discrete portion and the second discrete portion of the second electrically conductive material layer. A voltage is applied to the first electrically conductive material layer stack to modulate a resistance between the first discrete portion and the second discrete portion of the second electrically conductive material layer. | 08-22-2013 |
20140061648 | THIN FILM TRANSISTOR INCLUDING DIELECTRIC STACK - A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer, having a second pattern, is in contact with the first inorganic thin film dielectric layer. The first inorganic thin film dielectric layer and the second thin film dielectric layer have the same material composition. A semiconductor layer has a third pattern. A source/drain includes a second electrically conductive layer stack. | 03-06-2014 |
20140061649 | HIGH PERFORMANCE THIN FILM TRANSISTOR - A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer, having a second pattern, is in contact with the first inorganic thin film dielectric layer. The first inorganic thin film dielectric layer and the second thin film dielectric layer have the same material composition. A third inorganic thin film dielectric layer has a third pattern. A semiconductor layer is in contact with and has the same pattern as the third inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack. | 03-06-2014 |
20140061795 | THIN FILM TRANSISTOR INCLUDING IMPROVED SEMICONDUCTOR INTERFACE - A transistor includes a substrate; a gate including a first electrically conductive layer stack on the substrate; and a first inorganic thin film dielectric layer on the substrate with the first inorganic thin film dielectric layer having a first pattern. A second inorganic thin film dielectric layer has a second pattern. A semiconductor layer is in contact with and has the same pattern as the second inorganic thin film dielectric material layer. A source/drain includes a second electrically conductive layer stack. | 03-06-2014 |
20140061869 | ELECTRONIC ELEMENT INCLUDING DIELECTRIC STACK - An electronic element includes a substrate; a patterned first electrically conductive layer on the substrate; a patterned second electrically conductive layer on the substrate; and a dielectric stack on the substrate. A portion of the first electrically conductive layer and a portion of the second electrically conductive layer overlap each other such that an overlap region is present. At least a portion of the dielectric stack is positioned in the overlap region between the patterned first electrically conductive layer and the patterned second electrically conductive layer. The dielectric stack includes a first inorganic thin film dielectric material layer and a second inorganic thin film dielectric material layer. The first inorganic thin film dielectric material layer and the second inorganic thin film dielectric material layer have the same material composition. | 03-06-2014 |
20140065803 | PATTERNED THIN FILM DIELECTRIC STACK FORMATION - A method of producing an inorganic multi-layered thin film structure includes providing a substrate. A patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process. A second inorganic thin film material layer is selectively deposited on the region of the substrate where the thin film deposition inhibiting material layer is not present using an atomic layer deposition process. | 03-06-2014 |
20140065830 | PATTERNED THIN FILM DIELECTRIC STACK FORMATION - A method of producing a patterned inorganic thin film dielectric stack includes providing a substrate. A first patterned deposition inhibiting material layer is provided on the substrate. A first inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the first deposition inhibiting material layer is not present using an atomic layer deposition process. The first deposition inhibiting and first inorganic thin film dielectric material layers are simultaneously treated after deposition of the first inorganic thin film dielectric material layer. A second patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the second deposition inhibiting material layer is not present using an atomic layer deposition process. The first and second inorganic thin film dielectric material layers form a patterned inorganic thin film dielectric stack. | 03-06-2014 |
20140065831 | PATTERNED THIN FILM DIELECTRIC LAYER FORMATION - A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process. | 03-06-2014 |
20140065838 | THIN FILM DIELECTRIC LAYER FORMATION - A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A second inorganic thin film dielectric material layer is deposited on the treated surface of the first inorganic thin film dielectric material layer using an atomic layer deposition process. | 03-06-2014 |
20140374762 | CIRCUIT INCLUDING FOUR TERMINAL TRANSISTOR - An electrical circuit includes a substrate and a plurality of transistors. The plurality of transistors includes a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer. A gate includes a second electrically conductive material and a reentrant profile in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. A second electrically insulating material layer conforms to the reentrant profile of the gate and in positioned on at least a portion of the first electrically insulating material layer. A semiconductor material ayer conforms to and is in contact with the second electrically insulating material layer. | 12-25-2014 |
20140374806 | FOUR TERMINAL TRANSISTOR - A transistor includes a substrate, a first electrically conductive material layer positioned on the substrate, and a first electrically insulating material layer is positioned on the first electrically conductive material layer. A gate includes a second electrically conductive material and a reentrant profile in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. A second electrically insulating material layer conforms to the reentrant profile of the gate and in positioned on at least a portion of the first electrically insulating material layer. A semiconductor material layer conforms to and is in contact with the second electrically insulating material layer. | 12-25-2014 |
20140377943 | FOUR TERMINAL TRANSISTOR FABRICATION - Producing a transistor includes providing a substrate including in order a first electrically conductive material layer positioned on the substrate and a first electrically insulating material layer positioned on the first electrically conductive material layer. A gate including a reentrant profile is formed from an electrically conductive material layer stack provided on the first electrically insulating material layer in which a first portion of the gate is sized and positioned to extend beyond a second portion of the gate. The gate including the reentrant profile and at least a portion of the first electrically insulating material layer are conformally coated with a second electrically insulating material layer. The second electrically insulating material layer is conformally coated the with a semiconductor material layer. A source and drain electrodes are formed simultaneously by directionally depositing a second electrically conductive material layer on portions of the semiconductor material layer. | 12-25-2014 |
20140377955 | SUBSTRATE PREPARATION FOR SELECTIVE AREA DEPOSITION - A method of producing a patterned inorganic thin film element includes providing a substrate having a patterned thin layer of polymeric inhibitor on the surface. The substrate and the patterned thin layer of polymeric inhibitor are exposed to a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in areas without inhibitor using an atomic layer deposition process. | 12-25-2014 |
20140377963 | PATTERNING FOR SELECTIVE AREA DEPOSITION - A method of producing a patterned inorganic thin film element includes providing a substrate. A thin layer of polymeric inhibitor is uniformly depositing on the substrate. A patterned mask having open areas is provided on the thin layer of polymeric inhibitor. The thin layer of polymeric inhibitor is patterned by removing inhibitor from areas exposed by the open areas of the patterned mask using a highly reactive oxygen process. An inorganic thin film layer is deposited on the substrate in the areas exposed by the removal of the thin layer of polymeric inhibitor using an atomic layer deposition process. | 12-25-2014 |