Patent application number | Description | Published |
20120074584 | MULTI-LAYER TSV INSULATION AND METHODS OF FABRICATING THE SAME - Provided is a semiconductor device. The semiconductor device may include a substrate and a stacked insulation layer on a sidewall of an opening which penetrates the substrate. The stacked insulation layer can include at least one first insulation layer and at least one second insulation layer whose dielectric constant is different than that of the first insulation layer. One insulation layer may be a polymer and one insulation layer may be a silicon based insulation layer. The insulation layers may be uniform in thickness or may vary as a distance from the substrate changes. | 03-29-2012 |
20120091580 | Semiconductor Devices And Methods Of Fabricating The Same - Provided is a semiconductor device. The semiconductor device may include a first semiconductor chip that includes a first through silicon via having a first protrusion height and a second through silicon via having a second protrusion height greater than the first protrusion height which are penetrating at least a portion of the first semiconductor chip, a second semiconductor chip may be electrically connected to the first through silicon via, and a third semiconductor chip may be electrically connected to the second through silicon via. | 04-19-2012 |
20120112359 | Semiconductor Devices and Fabrication Methods thereof - A semiconductor device includes a first semiconductor chip, a first connection structure disposed on a first side of the first semiconductor chip, a second semiconductor chip disposed on a second side of the first semiconductor chip, and a second connection structure disposed between the first and second semiconductor chips, wherein a number of the second connection structures is less than a number of the first connection structures. | 05-10-2012 |
20120171814 | SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME - Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer. | 07-05-2012 |
20120214302 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - A method of fabricating a semiconductor device is provided. The method may include preparing a substrate having a first surface and a second surface, forming a via hole exposing at least a portion of the substrate from the first surface of the substrate, forming a first insulating film on an inner wall of the via hole, forming a conductive connection part filling an inside of the via hole including the first insulating film, polishing the second surface of the substrate until the conductive connection part is exposed, and selectively forming a second insulating film on the second surface of the substrate using an electrografting method to expose the conductive connection part. | 08-23-2012 |
20120292782 | MICROELECTRONIC DEVICES HAVING CONDUCTIVE THROUGH VIA ELECTRODES INSULATED BY GAP REGIONS - A microelectronic device includes a substrate having a trench extending therethrough between an active surface thereof and an inactive surface thereof opposite the active surface, a conductive via electrode extending through the substrate between sidewalls of the trench, and an insulating layer extending along the inactive surface of the substrate outside the trench and extending at least partially into the trench. The insulating layer defines a gap region in the trench that separates the substrate and the via electrode. Related devices and methods of fabrication are also discussed. | 11-22-2012 |
20140300004 | SEMICONDUCTOR PACKAGES AND METHODS OF FABRICATING THE SAME - Provided are a semiconductor package and a method of fabricating the same. In one embodiment, to fabricate a semiconductor package, a wafer having semiconductor chips fabricated therein is provided. A heat sink layer is formed over the wafer. The heat sink layer contacts top surfaces of the semiconductor chips. Thereafter, the plurality of semiconductor chips are singulated from the wafer. | 10-09-2014 |