Patent application number | Description | Published |
20080227238 | INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TECHNIQUES - An integrated circuit package system that includes: providing a first package including a first package first device and a first package second device both adjacent a first package substrate; and mounting and electrically interconnecting a second package over an electrical interconnect array formed on a substrate of the first package second device. | 09-18-2008 |
20090001612 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL SIDE CONNECTION - An integrated circuit package system comprising: connecting an integrated circuit die with a bottom connection structure; placing an adhesive encapsulation over the integrated circuit die and the bottom connection structure with the bottom connection structure exposed; and placing a top connection structure over the adhesive encapsulation at an opposing side to the bottom connection structure. | 01-01-2009 |
20090072375 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH MULTI-CHIP MODULE - An integrated circuit package system with multi-chip module is provided including: providing an upper substrate having an upper chip thereon; positioning a lower chip under the upper chip, the lower chip having bottom interconnects thereon; encapsulating the upper chip and the lower chip with a chip encapsulant on the upper substrate with the bottom interconnects exposed; mounting the lower chip over a lower substrate with a gap between the chip encapsulant and the lower substrate; and filling the gap with a package encapsulant or chip attach adhesive. | 03-19-2009 |
20110062602 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH FAN-IN PACKAGE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; connecting a base component directly to the base substrate; mounting a stack component over the base component; attaching a flattened exposed interconnect directly on the stack component; and applying an encapsulant over the stack component with a portion of the flattened exposed interconnect exposed. | 03-17-2011 |
20110084401 | PACKAGE-ON-PACKAGE SYSTEM WITH VIA Z-INTERCONNECTIONS AND METHOD FOR MANUFACTURING THEREOF - A method for manufacturing a package-on-package system includes: providing an interposer substrate; mounting a base substrate under the interposer substrate and having a first integrated circuit die connected thereto; forming an encapsulant between the interposer substrate and the base substrate, the encapsulant encapsulating the first integrated circuit die; and forming a via z-interconnection extending through the encapsulant and one of the substrates to the other of the substrates. | 04-14-2011 |
20110115098 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH DUAL SIDE CONNECTION AND METHOD FOR MANUFACTURING THEREOF - A method for manufacturing an integrated circuit package system includes: connecting an integrated circuit die with a bottom connection structure; placing an adhesive encapsulation over the integrated circuit die and the bottom connection structure with the bottom connection structure exposed; and placing a top connection structure over the adhesive encapsulation at an opposing side to the bottom connection structure. | 05-19-2011 |
20110210437 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED CONDUCTOR AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a substrate; forming a component connector on the substrate; forming a resist layer on the substrate with the component connector exposed; forming a vertical insertion cavity in the resist layer, the vertical insertion cavity isolated from the component connector or a further vertical insertion cavity, the vertical insertion cavity having a cavity side that is orthogonal to the substrate; forming a rounded interconnect in the vertical insertion cavity, the rounded interconnect nonconformal to the vertical insertion cavity; and mounting an integrated circuit device on the component connector. | 09-01-2011 |
20110233751 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a rounded interconnect on a package carrier having an integrated circuit attached thereto, the rounded interconnect having an actual center; forming an encapsulation over the package carrier covering the rounded interconnect; removing a portion of the encapsulation over the rounded interconnect with an ablation tool; calculating an estimated center of the rounded interconnect; aligning the ablation tool over the estimated center; and exposing a surface area of the rounded interconnect with the ablation tool. | 09-29-2011 |
20120228753 | INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH UNDERFILLING STRUCTURES AND METHOD OF MANUFACTURE THEREOF - A method of manufacturing of an integrated circuit packaging system includes: providing a bottom package in a cavity in a central region of the bottom package having inter-package interconnects in the cavity; forming a vent on an inter-package connection side of the bottom package from an exterior of the bottom package to the cavity; mounting a top package on the inter-package interconnects; and applying an underfill through the vent and into the cavity. | 09-13-2012 |