Patent application number | Description | Published |
20080225600 | METHOD OF READING DATA IN A NON-VOLATILE MEMORY DEVICE - A method of reading data in a non-volatile memory device includes providing a plurality of blocks and a plurality of bit lines, each block having a plurality of memory cells, each block coupled to at least one bit line. Frst and second bit lines are discharged to be at a low level, the first bit line coupled to a first block, the second bit line coupled to a second block. A read voltage is applied to a first word line coupled to a memory cell to be read in the first block. A pass voltage is applied to a second word line coupled to a memory cell not to be read in the first block. The first bit line coupled to the memory cell to be read is precharged to a high level after applying the read voltage to the first word line and the pass voltage to the second word line. A voltage level of the first bit line is evaluated. Data stored in the memory cell to be read is sensed in accordance with the evaluated voltage level of the first bit line. | 09-18-2008 |
20090040832 | SOFT PROGRAM METHOD IN A NON-VOLATILE MEMORY DEVICE - A soft program method in a non-volatile memory device for performing a soft program step so as to improve threshold voltage distribution of an erased cell is disclosed. The soft program method in a non-volatile memory device includes performing a soft program for increasing threshold voltages of memory cells by a given level, wherein an erase operation is performed about the memory cells, performing a verifying operation for verifying whether or not a cell programmed to a voltage more than a verifying voltage is existed in each of cell strings, and performing repeatedly the soft program until it is verified that whole cell strings have one or more cell programmed to the voltage more than the verifying voltage. | 02-12-2009 |
20090080262 | METHOD OF PROGRAMMING A NAND FLASH MEMORY DEVICE - A method of programming a NAND flash memory device includes providing a flash memory device, wherein word lines are disposed between a drain selecting line and a source selecting line, wherein a first word line is provided adjacent to the source selecting line and a last word line is provided adjacent to the drain selecting line; and selecting a word line to program memory cells coupled to the selected word line to perform an even LSB program operation and an odd LSB program operation for the selected first word line. Each of the word lines is selected until all of the word lines have been selected, so that the even LSB program operation and the odd LSB program operation can be performed for all of the word lines. The even LSB program operation is performed to store a lower rank data bit in memory cells coupled to an even bit line assigned a selected word line. The odd LSB program operation is performed to store a lower rank data bit in memory cells coupled to an odd bit line assigned to the selected word line. | 03-26-2009 |
20090285020 | METHOD OF PROGRAMMING A MULTI LEVEL CELL IN A NON-VOLATILE MEMORY DEVICE - In a method of programming a multi level cell, program speed increases as a program operation/erase operation is repeatedly performed. Particularly, in an ISPP method of reducing a program start voltage, much time may be required to finish a first verifying operation in an initial step where a few program operations/erase operations are performed. Accordingly, a blind verifying method may be applied in accordance with the number of the program operation/erase operations. | 11-19-2009 |
20090292860 | METHOD OF PROGRAMMING NON-VOLATILE MEMORY DEVICE - The present invention relates to a method of programming a non-volatile memory device. A method of programming an non-volatile memory device in accordance with an aspect of the present invention includes inputting n page of data, storing a single page of data in each of page buffer units of a plurality of memory cell units, programming a first page of data stored in a page buffer unit of a first memory cell unit, transferring a second page of data, stored in a page buffer unit of a second memory cell unit, to the page buffer unit of the first memory cell unit, and programming the transferred second page of data into the first memory cell unit. | 11-26-2009 |
20110075479 | MULTI-LEVEL CELL COPYBACK PROGRAM METHOD IN A NON-VOLATILE MEMORY DEVICE - A multi-level cell copyback program method in a non-volatile memory device is disclosed. The method includes performing a multi-level cell copyback program operation; performing selectively a first verifying operation, a second verifying operation or a third verifying operation in accordance with data stored in an MSB node of the first register or data stored in an LSB node of the second register. The first verifying operation is based on a first verifying voltage. The second verifying operation is based on a second verifying voltage higher than the first verifying voltage. And the third verifying operation is based on a third verifying voltage higher than the second verifying voltage. The copy back program operation is performed repeatedly in accordance with result of the verifying operation. | 03-31-2011 |
20110122706 | OPERATING METHOD IN A NON-VOLATILE MEMORY DEVICE - A method of verifying a non-volatile memory device to increase the read margin even though a negative verifying voltage is not applied is disclosed. The method of verifying a non-volatile memory device includes coupling a cell string to a bit line precharged to a high level through a sensing node, the cell string being provided between a common source line and the bit line; applying a verifying voltage to a plurality of word lines associated with the cell string; disconnecting the bit line from the sensing node; coupling the common source line to the cell string while the verifying voltage is applied to the word lines, wherein the common source line is applied with a bias voltage higher than a ground voltage; and coupling the bit line to the sensing node so as to detect a level of the bit line. | 05-26-2011 |
20130148433 | OPERATING METHOD IN A NON-VOLATILE MEMORY DEVICE - A method of verifying a non-volatile memory device includes precharging a bit line to a high level through a sensing node by applying a first voltage to a bit line select transistor coupled between the bit line and the sensing node; applying a verifying voltage to a plurality of word lines; disconnecting the bit line from the sensing node; and coupling the bit line to the sensing node by applying a second voltage to the bit line select transistor so as to detect a level of the bit line, the second voltage being smaller than the first voltage, wherein, a difference between the first voltage and the second voltage in a verifying operation is higher than a difference between a first voltage and a second voltage that are used in a read operation. | 06-13-2013 |