Segoria
Anthony Segoria, San Diego, CA US
Patent application number | Description | Published |
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20090111419 | DIRECT CONVERSION WITH VARIABLE AMPLITUDE LO SIGNALS - Techniques to reduce LO leakage by controlling the amplitude of LO signal based on the level of output signal after the frequency conversion process. An LO generator receives a VCO signal and generates an LO signal having a variable amplitude and a frequency that is related to the frequency of the VCO signal. A variable gain amplifier receives a control signal and adjusts the amplitude of the LO signal based on the control signal. The variable amplitude LO signal is used for frequency upconversion (e.g., direction upconversion) of an input signal (e.g., at baseband) to obtain an output signal (e.g., at RF). The relationship between LO signal amplitude and output signal level may be defined by a particular transfer function. In general, the LO signal is set higher for higher output signal level and is reduced proportionally for lower output signal level. | 04-30-2009 |
Anthony F. Segoria, San Diego, CA US
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20110050340 | SYSTEM AND METHOD FOR AMPLIFYING A SIGNAL USING MULTIPLE AMPLIFICATION STAGES SHARING A COMMON BIAS CURRENT - An apparatus including cascaded amplification stages adapted to be biased by a common DC current to generate an amplified output signal from an input signal. A first amplification stage includes a routing network to substantially double an input voltage signal, and a first transconductance gain stage to generate a first current signal from the input voltage signal. A second amplification stage includes a resonator to convert the first current signal into a second voltage signal, and a second transconductance gain stage to generate a second current signal from the first current signal. A third amplification stage includes a current gain stage to generate a third current signal from the second current signal, and a load through which the third current signal flows to generate the output signal. | 03-03-2011 |
20110058623 | SYSTEM AND METHOD FOR GENERATING A DEFINED PULSE - Apparatus for generating a first signal (e.g., a pulse) including a current source adapted to generate a current based on a second signal that defines an amplitude of the current and a third signal that defines the timing of an amplitude change of the current, and an impedance element through which the current flows to generate the first signal. The impedance element may comprise a resonator having a resonant frequency approximate the center of the first signal frequency spectrum. An LO may be used to generate the third signal to control the timing of the amplitude change of the current. A detector may enable the current source in response to detecting a defined steady-state condition of the LO clock signal, and may disable the current source in response to the completion of the first signal. A controller may generate the second signal to control the current amplitude so as to perform power control and/or other functions. | 03-10-2011 |
20110068765 | SYSTEM AND METHOD FOR POWER CALIBRATING A PULSE GENERATOR - An apparatus is disclosed for generating an output signal (e.g., a defined pulse), including a power or current calibration feature. The apparatus comprises a current source adapted to generate a first current to produce the output signal, a current sampling module adapted to generate a second current as a function of (e.g., substantially proportional or equal to) the first current, a reference current module (e.g., a bandgap current source) adapted to generate a third current, and a calibration module adapted to calibrate the first current based on the second and third currents. The current source comprises a plurality of selectable current paths. The current sampling module comprises a replica of at least a portion of one or more current paths of the current source. The calibration module may perform a calibration in response to a defined time, an environment parameter (temperature, voltage, pulse repetition frequency, amplitude requirement change, etc.), or the output signal not being generated. | 03-24-2011 |
Anthony Francis Segoria, San Diego, CA US
Patent application number | Description | Published |
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20090121763 | ADJUSTABLE DUTY CYCLE CIRCUIT - Techniques are disclosed for adjusting and programming the duty cycle of a signal generated by a circuit. In an embodiment, parallel transistors are coupled between a NAND gate and a supply voltage. Selectively enabling the parallel transistors adjusts the switching point of the NAND gate, thereby allowing control of the pulse width of the output signal. In an alternative embodiment, the size of the PMOS versus the NMOS transitors in the NAND gate is selectively varied to achieve the same effect. Further disclosed are applications of the techniques to calibrating the receiver to minimize measured second-order inter-modulation products and/or residual sideband. | 05-14-2009 |