Patent application number | Description | Published |
20110293216 | SEMICONDUCTOR HIGH-SPEED INTEGRATED ELECTRO-OPTIC DEVICES AND METHODS - Novel integrated electro-optic structures such as modulators and switches and methods for fabrication of the same are disclosed in a variety of embodiments. In an illustrative embodiment, a device includes a substrate with a waveguide and an optical resonator comprising polycrystalline silicon positioned on the substrate. First and second doped semiconducting regions also comprise polycrystalline silicon and are positioned proximate to the first optical resonator. The first optical resonator is communicatively coupled to the waveguide. | 12-01-2011 |
20120062974 | APPARATUS AND METHODS FOR WIDE TEMPERATURE RANGE OPERATION OF MICROMETER-SCALE SILICON ELECTRO-OPTIC MODULATORS - A thermally stabilized, high speed, micrometer-scale silicon electro-optic modulator is provided. Methods for maintaining desired temperatures in electro-optic modulators are also provided. The methods can be used to maintain high quality modulation in the presence of thermal variations from the surroundings. Direct current injection into the thermally stabilized electro-optic modulator is used to maintain the modulation performance of the modulator. The direct injected current changes the local temperature of the thermally stabilized electro-optic modulator to maintain its operation over a wide temperature range. | 03-15-2012 |
20120281286 | OPTOMECHANICAL NON-RECIPROCAL DEVICE - There is set forth herein an optomechanical device which can comprise a first mirror and a second mirror forming with the first mirror a cavity. In one aspect the first mirror can be a movable mirror. The optomechanical device can be adapted so that the first mirror is moveable responsively to radiation force. | 11-08-2012 |
20140001524 | Spin Hall Effect Memory | 01-02-2014 |
20140091411 | Repeated Spin Current Interconnects - One embodiment includes a metal layer including first and second metal portions; a ferromagnetic layer including a first ferromagnetic portion that directly contacts the first metal portion and a second ferromagnetic portion that directly contacts the second metal portion; and a first metal non-magnetic interconnect coupling the first ferromagnetic portion to the second ferromagnetic portion. The spin interconnect conveys spin polarized current suitable for spin logic circuits. The interconnect may be included in a current repeater such as an inverter or buffer. The interconnect may perform regeneration of spin signals. Some embodiments extend spin interconnects into three dimensions (e.g., vertically across layers of a device) using vertical non-magnetic metal interconnects. Spin interconnects that can communicate spin current without repeated conversion of the current between spin and electrical signals enable spin logic circuits by reducing power requirements, reducing circuit size, and increasing circuit speed. | 04-03-2014 |
20140139265 | HIGH SPEED PRECESSIONALLY SWITCHED MAGNETIC LOGIC - High speed precessionally switched magnetic logic devices and architectures are described. In a first example, a magnetic logic device includes an input electrode having a first nanomagnet and an output electrode having a second nanomagnet. The spins of the second nanomagnet are non-collinear with the spins of the first nanomagnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. In a second example, a magnetic logic device includes an input electrode having an in-plane nanomagnet and an output electrode having a perpendicular magnetic anisotropy (PMA) magnet. A channel region and corresponding ground electrode are disposed between the input and output electrodes. | 05-22-2014 |
20140142915 | METHODS AND APPARATUS FOR MODELING AND SIMULATING SPINTRONIC INTEGRATED CIRCUITS - Described are apparatus and method for simulating spintronic integrated circuit (SPINIC), the method comprising: generating a spin netlist indicating connections of spin nodes of spin circuits and nodes of general circuits; and modifying a modified nodal analysis (MNA) matrix for general circuits to generate a spin MNA matrix for solving spin circuits and general circuits of the spin netlist. | 05-22-2014 |
20140160628 | STRUCTURE TO MAKE SUPERCAPACITOR - A charge storage fiber is described. In an embodiment, the charge storage fiber includes a flexible electrically conducting fiber, a dielectric coating on the flexible electrically conducting fiber, and a metal coating on the dielectric coating. In an embodiment, the charge storage fiber is attached to a textile-based product. | 06-12-2014 |
20140170919 | FLEXIBLE EMBEDDED INTERCONNECTS - Flexible electronically functional fibers are described that allow for the placement of electronic functionality in traditional fabrics. The fibers can be interwoven with natural fibers to produce electrically functional fabrics and devices that can retain their original appearance. | 06-19-2014 |
20140170920 | ELECTRICALLY FUNCTIONAL FABRIC FOR FLEXIBLE ELECTRONICS - Flexible electronically functional fabrics are described that allow for the placement of electronic functionality in flexible substrates such as traditional fabrics. The fabrics can be made using flexible electronically functional fibers or a combination of electronically functional fibers and textile fibers. Electronic devices can be incorporated into the fabric to give it full computing capabilities. | 06-19-2014 |
20140173716 | METHOD AND APPARATUS FOR MANAGING AND ACCESSING PERSONAL DATA - Managing and accessing personal data is described. In one example, an apparatus has an application processor, a memory to store data, a receive and a transmit array coupled to the application processor to receive data to store in the memory and to transmit data stored in the memory through a wireless interface, and an inertial sensor to receive user commands to authorize the processor to receive and transmit data through the receive and transmit array. | 06-19-2014 |
20140176367 | INTEGRATED ACCOUSTIC PHASE ARRAY - A system includes a processor and a phased array, coupled to the processor, having an arrayed waveguide for acoustic waves to enable directional sound communication. | 06-26-2014 |
20140219012 | MAGNETIC STATE ELEMENT AND CIRCUITS - Described is an apparatus, for spin state element device, which comprises: a variable resistive magnetic (VRM) device to receive a magnetic control signal to adjust resistance of the VRM device; and a magnetic logic gating (MLG) device, coupled to the VRM device, to receive a magnetic logic input and perform logic operation on the magnetic logic input and to drive an output magnetic signal based on the resistance of the VRM device. Described is a magnetic demultiplexer which comprises: a first VRM device to receive a magnetic control signal to adjust resistance of the first VRM; a second VRM device to receive the magnetic control signal to adjust resistance of the second VRM device; and an MLG device, coupled to the first and second VRM devices, the MLG device having at least two output magnets to output magnetic signals based on the resistances of the first and second VRM devices. | 08-07-2014 |
20140262707 | NANOWIRE-BASED MECHANICAL SWITCHING DEVICE - Nanowire-based mechanical switching devices are described. For example, a nanowire relay includes a nanowire disposed in a void disposed above a substrate. The nanowire has an anchored portion and a suspended portion. A first gate electrode is disposed adjacent the void, and is spaced apart from the nanowire. A first conductive region is disposed adjacent the first gate electrode and adjacent the void, and is spaced apart from the nanowire. | 09-18-2014 |
20140269034 | INTEGRATED CAPACITOR BASED POWER DISTRIBUTION - An embodiment provides power (having low voltage, high current, and high current density) to ultra low voltage non-CMOS based devices using a distributed capacitor that is integrated onto the same chip as the non-CMOS devices. For example, an embodiment provides a spin logic gate adjacent dielectric material and first and second plates of a capacitor. The capacitor discharges low voltage/high current to the spin logic gate using a step down switched mode power supply that charges numerous capacitors during one clock cycle (using a switching element configured in a first orientation) and discharges power from the capacitors during the opposite clock cycle (using the switching element configured in a second orientation). The capacitors discharge the current out of plane and to the spin logic devices without having to traverse long power dissipating interconnect paths. Other embodiments are described herein. | 09-18-2014 |
20140269035 | CROSS POINT ARRAY MRAM HAVING SPIN HALL MTJ DEVICES - Cross point array magnetoresistive random access memory (MRAM) implementing spin hall magnetic tunnel junction (MTJ)-based devices and methods of operation of such arrays are described. For example, a bit cell for a non-volatile memory includes a magnetic tunnel junction (MTJ) stack disposed above a substrate and having a free magnetic layer disposed above a dielectric layer disposed above a fixed magnetic layer. The bit cell also includes a spin hall metal electrode disposed above the free magnetic layer of the MTJ stack. | 09-18-2014 |
20140292429 | MULTIGATE RESONANT CHANNEL TRANSISTOR - An embodiment includes an oscillator comprising an amplifier formed on a substrate; a multiple gate resonant channel array, formed on the substrate, including: (a) transistors including fins, each of the fins having a channel between source and drain nodes, coupled to common source and drain contacts; and (b) common first and second tri-gates coupled to each of the fins and located between the source and drain contacts; wherein the fins mechanically resonate at a first frequency when one of the first and second tri-gates is periodically activated to produce periodic downward forces on the fins. Other embodiments include a non planar transistor with a channel between the source and drain nodes and a tri-gate on the fin; wherein the fin mechanically resonates when the first tri-gate is periodically activated to produce periodic downward forces on the fin. Other embodiments are described herein. | 10-02-2014 |
20140313559 | OPTOMECHANICAL OSCILLATOR NETWORK, CONTROL AND SYNCHRONIZATION METHODS, AND APPLICATIONS - A synchronizable optomechanical oscillator (OMO) network including at least two dissimilar silicon nitride (Si | 10-23-2014 |