Patent application number | Description | Published |
20080308913 | STACKED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A stacked semiconductor package includes a first semiconductor package, a second semiconductor package and a conductive connection member. The first semiconductor package includes a first semiconductor chip, a first lead frame having first outer leads that are electrically connected to the first semiconductor chip, and a first molding member formed on the first semiconductor chip and the first lead frame to expose the first outer leads. The second semiconductor package includes a second semiconductor chip, a second lead frame formed on the first molding member and having second outer leads that may be electrically connected to the second semiconductor chip, and a second molding member formed on the second semiconductor chip and the second lead frame to expose the second outer leads. The conductive connection member may electrically connect the first outer leads and the second outer leads to each other. Further, the conductive connection member may have a crack-blocking groove. | 12-18-2008 |
20090026596 | LEAD FRAME, SEMICONDUCTOR PACKAGE, AND STACKED SEMICONDUCTOR PACKAGE HAVING THE SAME - In certain embodiments, a lead frame includes a paddle, a plurality of inner leads, first outer leads, and a second outer lead. The plurality of inner leads can be arranged at a side face of the paddle. The first outer leads can extend from the inner leads along a first direction and can be arranged at a substantially central portion of the side face of the paddle. Furthermore, each of the first outer leads can have a first area. The second outer lead can be arranged at an edge portion of the side face of the paddle and can be supported by the paddle. The second outer lead can have a second area that is larger than the first area. | 01-29-2009 |
20090032916 | SEMICONDUCTOR PACKAGE APPARATUS - A semiconductor package apparatus and a method of fabricating the semiconductor package apparatus. The semiconductor package apparatus includes: semiconductor chips comprising active and inactive surfaces and protected by a packing portion; a substrate on which the semiconductor chips are installed; leads comprising front portions electrically coupled to the active surfaces of the semiconductor chips and rear portions extending substantially to the substrate; and bonding materials bonded between ends of the rear portions of the leads and the substrate to electrically couple the leads to the substrate. Ends of the rear portions of the leads may stand on the substrate. Thus, solder joint reliability can be improved, and a wetting characteristic of solder can be improved during surface installation. Also, semiconductor package apparatuses having similar attributes can easily be multilayered. In addition, a foot print of the semiconductor package apparatus can be reduced to enable high-density installation. Moreover, shapes of the bonding materials (solder) can be controlled to optimize bonding strength of the leads, quantity of the bonding materials, or the like. | 02-05-2009 |
20090057916 | SEMICONDUCTOR PACKAGE AND APPARATUS USING THE SAME - A semiconductor package is provided. The semiconductor package comprises a substrate having a top surface and a bottom surface, a first semiconductor chip having a plurality of bonding pad regions electrically connected to the substrate by a plurality of first bonding wires, a spacer tape covering the active surface of the first semiconductor chip excluding the plurality of bonding pad regions, and a second semiconductor chip mounted on the active surface of the first semiconductor chip with the spacer interposed. | 03-05-2009 |
20090184410 | SEMICONDUCTOR PACKAGE APPARATUS HAVING REDISTRIBUTION LAYER - Provided is a semiconductor package apparatus having a redistribution layer. The apparatus includes at least one or more semiconductor chips, a packing part protecting the semiconductor chips, and a support part supporting the semiconductor chips. The apparatus also includes external terminals extending outside the packing part, redistribution layers installed between the semiconductor chips and the support part and including redistribution paths, first signal transmitting units, and second signal transmitting units. The first signal transmitting units transmitting electrical signals generated from the semiconductor chips to the redistribution paths of the redistribution layers, and the second signal transmitting units transmit the electrical signals from the redistribution paths to the external terminals. Therefore, a size and a thickness of the semiconductor package apparatus can be reduced, and processes can be simplified to improve productivity. | 07-23-2009 |
20120189963 | WATER-SOLUBLE RESIN COMPOSITION AND METHOD OF FORMING FINE PATTERNS BY USING THE SAME - A water-soluble resin composition for forming fine patterns comprising water-soluble polymer represented by Chemical Formula 1 as below and the first water-soluble solvent, is coated and heated on a photoresist layer having at least one contact hole to reduce a size of the at least one contact hole. | 07-26-2012 |
20130216957 | WATER-SOLUBLE RESIN COMPOSITION FOR FORMING FINE PATTERNS AND METHOD OF FORMING FINE PATTERNS BY USING THE SAME - The water-soluble resin composition for forming fine patterns comprises a water-soluble polymer represented by Chemical Formula 1 and a first water-soluble solvent. The composition is coated and heated on a photoresist layer having contact holes to reduce a size of the contact holes. | 08-22-2013 |
20130251033 | METHOD OF COMPRESSING VIDEO FRAME USING DUAL OBJECT EXTRACTION AND OBJECT TRAJECTORY INFORMATION IN VIDEO ENCODING AND DECODING PROCESS - Disclosed is a method of compressing video frame using dual object extraction and object trajectory information in a video encoding and decoding process, including: segmenting a background and a object from a reference frame in video to extract the object, extracting and encoding motion information of the object based on the object, determining whether a frame is a reference frame based on encoded video in a decoding process, if it is determined that the frame is the reference frame, generating background information of a prediction frame based on the reference frame, and generating the prediction frame by extracting an object of the reference frame and referring to header information to reflect motion information of the object. | 09-26-2013 |
20130251279 | IMAGE ENCODING METHOD USING ADAPTIVE PREPROCESSING SCHEME - The present invention relates to an image encoding method using an adaptive preprocessing scheme, including loading an input image for each frame, determining an encoding type of each of the frames, determining the size of a block to be encoded in each frame according to the determined encoding type, determining blocks that can be replicated from the blocks having the determined size and performing an intra-picture replication preprocessing or inter-picture replication preprocessing procedure on the determined blocks according to the encoding types of the frames, and encoding the frames on which the preprocessing procedure has been performed. | 09-26-2013 |
20130279821 | IMAGE ENCODING METHOD USING BINARY PARTITION TREE - An image encoding method using a Binary Partition Tree (BPT) includes performing the BPT on a reference frame, detecting blocks, each having a difference in a pixel value exceeding a threshold value in a current frame, based on a result of the BPT of the reference frame, and performing the BPT of the current frame on the detected blocks. In accordance with the present invention, block partition is not applied to all frames, but a partial partition method based on a difference between the pixel values of a reference frame and a current frame to be encoded is provided. Accordingly, the encoding speed within the P frame or the B frame can be improved. Furthermore, the PSNR of a corresponding frame can be maintained within a specific range of the PSNR of a reference frame, and a compression effect can be improved. | 10-24-2013 |