Patent application number | Description | Published |
20080277656 | METHOD OF MANUFACTURING ZnO SEMICONDUCTOR LAYER FOR ELECTRONIC DEVICE AND THIN FILM TRANSISTOR INCLUDING THE ZnO SEMICONDUCTOR LAYER - Provided are a method of manufacturing a ZnO semiconductor layer for an electronic device, which can control the size of crystals of the ZnO semiconductor layer and the number of carriers using a surface chemical reaction between precursors, and a thin film transistor (TFT) including the ZnO semiconductor layer. The method includes: (a) loading a substrate into a chamber; (b) injecting a Zn precursor into the chamber to adsorb the Zn precursor on the substrate; (c) injecting an inert gas or N | 11-13-2008 |
20100006837 | COMPOSITION FOR OXIDE SEMICONDUCTOR THIN FILM, FIELD EFFECT TRANSISTOR USING THE COMPOSITION AND METHOD OF FABRICATING THE TRANSISTOR - Provided are a composition for an oxide semiconductor thin film, a field effect transistor using the same and a method of fabricating the field effect transistor. The composition includes an aluminum oxide, a zinc oxide, an indium oxide and a tin oxide. The thin film formed of the composition is in amorphous phase. The field effect transistor having an active layer formed of the composition can have an improved electrical characteristic and be fabricated by a low temperature process. | 01-14-2010 |
20100187552 | HYBRID WHITE ORGANIC LIGHT EMITTTNG DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided are a hybrid white organic light emitting diode (OLED) and a method of fabricating the same. A HOMO level difference between a fluorescent emission layer and an electron transport layer in an organic emission layer (OLED) becomes higher than that between the other layers or a LUMO level difference between a fluorescent emission layer and a hole transport layer is higher than that between the other layers, so that a recombination region is restricted to a part of an emission layer to obtain high-efficiency fluorescent light emission. In addition, triplet excitons that are not used in a fluorescent emission layer are transferred to an auxiliary emission layer formed to be spaced apart from a recombination region by a predetermined distance to emit light in a different color from the fluorescent emission layer, so that both singlet and triplet excitons formed in the OLED are used to obtain high-efficiency white light emission. | 07-29-2010 |
20110049592 | NONVOLATILE MEMORY CELL AND METHOD OF MANUFACTURING THE SAME - Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region. | 03-03-2011 |
20110084274 | METHOD OF MANUFACTURING P-TYPE ZnO SEMICONDUCTOR LAYER USING ATOMIC LAYER DEPOSITION AND THIN FILM TRANSISTOR INCLUDING THE P-TYPE ZnO SEMICONDUCTOR LAYER - Provided are a method of manufacturing a transparent N-doped p-type ZnO semiconductor layer using a surface chemical reaction between precursors containing elements constituting thin layers, and a thin film transistor (TFT) including the p-type ZnO semiconductor layer. The method includes the steps of: preparing a substrate and loading the substrate into a chamber; injecting a Zn precursor and an oxygen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the oxygen precursor using an atomic layer deposition (ALD) technique to form a ZnO thin layer on the substrate; and injecting a Zn precursor and an nitrogen precursor into the chamber, and causing a surface chemical reaction between the Zn precursor and the nitrogen precursor to form a doping layer on the ZnO thin layer. | 04-14-2011 |
20110249202 | POWER REDUCTION TELEVISION WITH PHOTO FRAME - A power reduction television with a photo frame is provided. The power reduction television includes a first display configured to display a first video image, a low power second display configured to display a second video image, and a display control unit configured to control the second display to display the second video image, when the first video image is not displayed through the first display. | 10-13-2011 |
20110253997 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a semiconductor device using a p-type oxide semiconductor layer and a method of manufacturing the same. The device includes the p-type oxide layer formed of at least one oxide selected from the group consisting of a copper(Cu)-containing copper monoxide, a tin(Sn)-containing tin monoxide, a copper tin oxide containing a Cu—Sn alloy, and a nickel tin oxide containing a Ni—Sn alloy. Thus, transparent or opaque devices are easily developed using the p-type oxide layer. Since an oxide layer that is formed using a low-temperature process is applied to a semiconductor device, the manufacturing process of the semiconductor device is simplified and manufacturing costs may be reduced. | 10-20-2011 |
20110266542 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - Provided are a semiconductor device including a dual gate transistor and a method of fabricating the same. The semiconductor device includes a lower gate electrode, an upper gate electrode on the lower gate electrode, a contact plug interposed between the lower gate electrode and the upper gate electrode, and connecting the lower gate electrode to the upper gate electrode, and a functional electrode spaced apart from the upper gate electrode and formed at the same height as the upper gate electrode. The dual gate transistor exhibiting high field effect mobility is applied to the semiconductor device, so that characteristics of the semiconductor device can be improved. In particular, since no additional mask or deposition process is necessary, a large-area high-definition semiconductor device can be mass-produced with neither an increase in process cost nor a decrease in yield. | 11-03-2011 |
20110305062 | MEMORY CELL AND MEMORY DEVICE USING THE SAME - Provided are a memory cell and a memory device using the same, particularly, a nonvolatile non-destructive readable random access memory cell including a ferroelectric transistor as a storage unit and a memory device using the same. The memory cell includes a ferroelectric transistor having a drain to which a reference voltage is applied, a first switch configured to allow a source of the ferroelectric transistor to be connected to a first line in response to a scan signal, and a second switch configured to allow a gate of the ferroelectric transistor to be connected to a second line in response to the scan signal. The memory device enables random access and performs non-destructive read-out (NDRO) operations. | 12-15-2011 |
20120032186 | WHITE ORGANIC LIGHT EMITTING DEVICE - Provided is a white organic light emitting device (OLED), including: a first electrode formed on a substrate; a hole transport layer formed on the first electrode; an emission layer formed on the hole transport layer; an electron transport layer formed on the emission layer; and an color control layer formed on at least one of the hole transport layer, the emission layer and the electron transport layer, and emitting green and/or red by energy transfer from the emission layer. The white OLED emits red, green and blue light with high efficiency, has excellent color reproducibility and a high color reproduction index. | 02-09-2012 |
20120134197 | MEMORY CELL AND MEMORY DEVICE USING THE SAME - Provided is a memory cell including: a ferroelectric transistor; a plurality of switching elements electrically connected to the ferroelectric transistor; and a plurality of control lines for transmitting individual control signals to each of the plurality of switching element for separately controlling the plurality of switching elements. The plurality of switching elements are configured to be separately controlled on the basis of the individual control signals so as to prevent each electrode of the ferroelectric transistor from being floated. | 05-31-2012 |
20120157713 | METHOD FOR PREPARATION OF 4,4'-DINITRODIPHENYLAMINE AND 4,4'-BIS(ALKYLAMINO)DIPHENYLAMINE WITH THE BASE CATALYST COMPLEX - Provided is a method for preparing 4,4′-dinitrodiphenylamine (4,4′-DNDPA) in high yield via the NASH reaction using a mixture of a bis-quaternary ammonium base and a base catalyst for the reaction of urea with nitrobenzene, and a method of preparing 4,4′-bis(alkylamino)diphenylamine (4,4′BAADA) in high yield and purity by hydrogenating the resulting 4,4′-DNDPA with a ketone in the presence of hydrogen and hydrogenation catalyst. The catalyst complex used in the present invention allows easy recovery, provides superior alkaline stability and is capable of reducing production cost. | 06-21-2012 |
20120157714 | METHOD FOR PREPARATION OF 4,4'-DINITRODIPHENYLAMINE AND 4,4'-BIS(ALKYLAMINO)DIPHENYLAMINE BY USING 4-NITROANILINE - Provided is a method of preparing 4,4′-dinitrodiphenylamine (4,4′-DNDPA) in high yield by reacting 4-nitroaniline with excess nitrobenzene via the NASH reaction, and a method of preparing 4,4′-bis(alkylamino)diphenylamine (4,4′BAADA) in high yield and purity by hydrogenating the resulting 4,4′-DNDPA with a ketone compound in the presence of hydrogen and hydrogenation catalyst. The disclosed process is simple, allows selective preparation of 4,4′-DNDPA without byproducts, and thus allows preparation of 4,4′-BAADA in high yield without a complicated purification procedure. | 06-21-2012 |
20120168761 | ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE AND METHOD FOR MANUFACTURING THE SAME - Disclosed are an active matrix organic light emitting diode and a method for manufacturing the same. The active matrix organic light emitting diode includes: a substrate; a black matrix formed above a part of the substrate; at least one thin film transistor formed above the black matrix; a passivation film formed to entirely cover the at least one thin film transistor; a planarizing layer formed above the passivation film; a color filter formed above an upper part of the planarizing layer opposite to the position where the at least one thin film transistor is formed; and an organic light emitting diode formed above the color filter. | 07-05-2012 |
20120286271 | OXIDE THIN FILM TRANSISTOR RESISTANT TO LIGHT AND BIAS STRESS, AND A METHOD OF MANUFACTURING THE SAME - Disclosed are an oxide thin film transistor resistant to light and bias stress, and a method of manufacturing the same. The method includes forming a gate electrode on a substrate; forming a gate insulating layer on an upper part including the gate electrode; forming a source electrode and a drain electrode on the insulating layer; forming an active layer insulated from the gate electrode by the gate insulating layer and formed of an oxide semiconductor and a diffusion barrier film; and forming a protective layer on a portion of the source electrode and drain electrode and the upper part including the active layer, wherein the diffusion barrier film reduces movement of holes and prevents ionized oxygen vacancies from being diffused. | 11-15-2012 |
20130088285 | DC VOLTAGE CONVERSION CIRCUIT OF LIQUID CRYSTAL DISPLAY APPARATUS - Disclosed is a DC voltage conversion circuit of a liquid crystal display apparatus, including: a main pumping circuit including a plurality of thin film transistors and configured to output voltage for driving a liquid crystal display apparatus when the plurality of thin film transistors are alternately turned on or off; and a switch control signal generator configured to control voltages applied to gates of the plurality of thin film transistors by inversion of a clock signal, in which each thin film transistor is turned on when positive gate-source voltage is applied thereto, and turned off when negative gate-source voltage is applied thereto. | 04-11-2013 |
20130100516 | ELECTRO WETTING DISPLAY - Provided is an electro wetting display capable of improving driving stability by more stably controlling movement of a nonpolar fluid among electro wetting elements. The electro wetting display according to an exemplary embodiment of the present disclosure includes: a first substrate formed on a viewing side of the display, a second substrate formed on a rear side of the display, a pixel partition wall formed between the first and second substrates to partition a pixel area, in which a part of the partition wall is made of a conductive material, and a polar fluid and a nonpolar fluid filled in the pixel area partitioned by the pixel partition wall. | 04-25-2013 |
20130161732 | VERTICAL CHANNEL THIN FILM TRANSISTOR - Disclosed is a vertical channel thin film transistor including a substrate; a drain electrode formed on the substrate; a spacer formed on the substrate while coming into contact with the drain electrode; a source electrode formed on the spacer; an active layer formed on an entire surface of the substrate including the drain electrode and the source electrode and configured to form a vertical channel; a gate insulating layer formed on the active layer; and a gate electrode formed on the gate insulating layer. | 06-27-2013 |
20130208022 | DUAL MODE FUNCTION PIXEL AND DUAL MODE FUNCTION DISPLAY INCLUDING THE SAME - Disclosed is a dual mode function pixel that operates either in a first mode or in a second mode according to the intensity of a projected light to have a high visibility regardless of the intensity of projected light. The dual mode function pixel includes: a first membrane on which a self-luminescent element is formed; one or more membranes formed to surround the first membrane; and a lower layer formed below the first membrane and the one or more membranes to be spaced apart from the first membrane and the one or more membranes. The dual mode function pixel is controlled such that the self-luminescent element is driven either to emit light in a first mode operation or to selectively reflect a projected light by utilizing an interference of light generated between the first to one or more membranes and the lower layer in a second mode operation. | 08-15-2013 |
20130264564 | METHOD FOR MANUFACTURING OXIDE THIN FILM TRANSISTOR - Disclosed is a method for manufacturing an oxide thin film transistor, including: forming a gate electrode on a substrate on which a buffer layer is formed; forming a gate insulation layer on an entire surface of the substrate on which the gate electrode is formed; forming an oxide semiconductor layer on the gate insulation layer; forming a first etch stop layer on the oxide semiconductor layer; forming a second etch stop layer on the first etch stop layer by an atomic layer deposition method; patterning the first etch stop layer and the second etch stop layer, or forming a contact hole, through which a part of the oxide semiconductor layer is exposed, in the first etch stop layer and the second etch stop layer; forming a source electrode and a drain electrode on the first etch stop layer and the second etch stop layer; and forming a passivation layer on the entire surface of the substrate on which the source electrode and the drain electrode are formed. | 10-10-2013 |
20130302923 | METHOD FOR MANUFACTURING AN ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE - Disclosed are an active matrix organic light emitting diode and a method for manufacturing the same. The active matrix organic light emitting diode includes: a substrate; a black matrix formed above a part of the substrate; at least one thin film transistor formed above the black matrix; a passivation film formed to entirely cover the at least one thin film transistor; a planarizing layer formed above the passivation film; a color filter formed above an upper part of the planarizing layer opposite to the position where the at least one thin film transistor is formed; and an organic light emitting diode formed above the color filter. | 11-14-2013 |
20140011297 | NONVOLATILE MEMORY CELL AND METHOD OF MANUFACTURING THE SAME - Provided are a nonvolatile memory cell and a method of manufacturing the same. The nonvolatile memory cell includes a memory transistor and a driver transistor. The memory transistor includes a semiconductor layer, a buffer layer, an organic ferroelectric layer, and a gate electrode, which are disposed on a substrate. The driver transistor includes the semiconductor layer, the buffer layer, a gate insulating layer, and the gate electrode, which are disposed on the substrate. The memory transistor and the driver transistor are disposed on the same substrate. The nonvolatile memory cell is transparent in a visible light region. | 01-09-2014 |
20140035621 | INVERTER, NAND GATE, AND NOR GATE - Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal. | 02-06-2014 |
20140035622 | INVERTER, NAND GATE, AND NOR GATE - Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal. | 02-06-2014 |
20140042475 | DUAL DISPLAY DEVICE WITH VERTICAL STRUCTURE - Disclosed is a dual display device having a vertical structure, in which a reflective display device and a self-emissive display device are formed on one substrate in a vertical structure so as to enable a reflective display or a self-emissive display according to a situation and provide a high resolution display. The dual display device having a vertical structure includes: a thin film transistor formed on a substrate; a white light emitting device formed on the thin film transistor: a reflection adjusting layer formed on the white light emitting device; and a color converting layer formed on the reflection adjusting layer. | 02-13-2014 |
20140042539 | SELF-ALIGNED THIN FILM TRANSISTOR WITH DOPING BARRIER AND METHOD OF MANUFACTURING THE SAME - Disclosed are a self-aligned thin film transistor controlling a diffusion length of a doping material using a doping barrier in a thin film transistor having a self-aligned structure and a method of manufacturing the same. The self-aligned thin film transistor with a doping barrier includes: an active layer formed on a substrate and having a first doping region, a second doping region, and a channel region; a gate insulating film formed on the channel region; a gate electrode formed on the gate insulating film; a doping source film formed on the first doping region and the second doping region; and a doping barrier formed between the doping source film and the first doping region and between the doping source film and the second doping region. | 02-13-2014 |
20140062572 | SINGLE INPUT LEVEL SHIFTER - Provided is a single input level shifter. The single input level shifter includes: an input unit applying a power voltage to a first node in response to an input signal and applying the input signal to a second node in response to a reference signal; a bootstrapping unit applying the power voltage to the second node according to a voltage level of the first node; and an output unit applying the input signal to an output terminal in response to the reference signal and applying the power voltage to the output terminal according to the voltage level of the first node, wherein the bootstrapping unit includes a capacitor between the first and second nodes, and when the input signal is shifted from a first voltage level to a second voltage level, the bootstrapping unit raises the voltage level of the first node to a level higher than the power voltage. | 03-06-2014 |
20140145180 | SELF-ALIGNED THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF - Disclosed are a self-aligned thin film transistor capable of simultaneously improving an operation speed and stability and minimizing a size thereof by forming source and drain electrodes so as to be self-aligned, and a fabrication method thereof. The method of fabricating a thin film transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a gate insulator, and a gate layer on a substrate; forming a photoresist layer pattern for defining a shape of a gate electrode on the gate layer; etching the gate layer, the gate insulator, and the active layer by using the photoresist layer pattern; depositing a source and drain layer on the etched substrate by a deposition method having directionality; and forming a gate electrode and self-aligned source electrode and drain electrode by removing the photoresist layer pattern. | 05-29-2014 |
20140367689 | TRANSISTOR AND METHOD OF FABRICATING THE SAME - Provided is a transistor. The transistor includes: a substrate; a semiconductor layer provided on the substrate and having one side vertical to the substrate and the other side facing the one side; a first electrode extending along the substrate and contacting the one side of the semiconductor layer; a second electrode extending along the substrate and contacting the other side of the semiconductor layer; a conductive wire disposed on the first electrode and spaced from the second electrode; a gate electrode provided on the semiconductor layer; and a gate insulating layer disposed between the semiconductor layer and the gate electrode, wherein the semiconductor layer, the first electrode, and the second electrode have a coplanar. | 12-18-2014 |