Patent application number | Description | Published |
20090008765 | CHIP EMBEDDED SUBSTRATE AND METHOD OF PRODUCING THE SAME - A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip. | 01-08-2009 |
20090072011 | METHOD OF MOUNTING CONDUCTIVE BALL AND CONDUCTIVE BALL MOUNTING APPARATUS - A method of mounting a conductive ball according to the present invention includes the steps of, disposing a mask on a substrate including connection pads, the mask having opening portions corresponding to the connection pad, supplying conductive balls on the mask, arranging the conductive balls on the connection pad of the substrate through the opening portions of the mask by moving the conductive balls to one end side of the mask by ball moving member (a brush), and removing excess conductive balls remaining on a region of the mask where the opening portions are provided, by bonding the excess conductive balls to a ball removal film (adhesive film). | 03-19-2009 |
20090081867 | METHOD OF MANUFACTURING SUBSTRATE - The present disclosure relates to a method of manufacturing a substrate. The method includes: (a) forming through holes by applying an anisotropic etching to a silicon substrate from a first surface of the silicon substrate; (b) forming a first insulating film to cover the first surface of the silicon substrate, surfaces of the silicon substrate exposed from the through holes, and a second surface of the silicon substrate opposite to the first surface; (c) forming an opening in a portion of the first insulating film provided on the second surface, the portion of the first insulating film corresponding to an area in which the through holes are formed; (d) etching the silicon substrate using the first insulating film provided on the second surface as a mask, thereby forming a cavity in the silicon substrate; and (e) removing the first insulating film. | 03-26-2009 |
20090130838 | METHOD OF FORMING CONDUCTIVE BUMPS - A method of forming a conductive bump of the present invention, includes the steps of, preparing a substrate including a connection pad and a protection insulating layer, in which an opening portion is provided on the connection pad, on a surface layer side, arranging a first conductive ball, at least an outer surface portion of which is made of solder, on the connection pad in the opening portion of the protection insulating layer, filling a solder layer in the opening portion by applying a reflow heating to the first conductive ball, arranging a second conductive ball on the solder layer, and obtaining a conductive bump which protrudes from an upper surface of the protection insulating layer, by joining the solder layer and the second conductive ball by a reflow heating. | 05-21-2009 |
20100101849 | ELECTRONIC COMPONENT BUILT-IN SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing an electronic component built-in substrate, includes the steps of mounting a chip-like electronic component having a connection pad and a metal protection layer formed on a whole of one surface to cover the connection pad, on a wiring substrate to direct the connection pad upward; embedding the electronic component with the insulating layer; processing the insulating layer in a thickness direction to leave the insulating layer in a side of the electronic component and to expose the metal protection layer of the electronic component; and forming an upper wiring layer having an in-chip wiring part which is connected to the connection pad and contacts an upper surface of the electronic component and is constructed by an underlying metal pattern layer formed by patterning the metal protection layer and a conductive pattern layer formed thereon, and an extended wiring part which is connected to the in-chip wiring part to extend onto the insulating layer and is formed by an identical layer as the conductive pattern layer. | 04-29-2010 |
20100109160 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device, includes the steps of preparing a semiconductor wafer having a connection pad, forming an insulating dam layer in which an opening portion is provided in an area including the connection pad, on the semiconductor wafer, and forming a bump electrode by mounting a conductive ball on the connection pad in the opening portion of the insulating dam layer. | 05-06-2010 |
20100155862 | PACKAGE FOR ELECTRONIC COMPONENT, MANUFACTURING METHOD THEREOF AND SENSING APPARATUS - A package for electronic component comprises a rectangular package body having a flat cut surface to be abutted on a flat mounting surface of a mounting substrate, a first side surface intersecting with the flat cut surface, and a first notch part formed at a boundary between the flat cut surface and the first side surface, an electronic component installed in the package body, and a first pad electrically connected to the electronic component and formed on an inner wall surface of the first notch part. | 06-24-2010 |
20110147951 | WIRING SUBSTRATE AND SEMICONDUCTOR DEVICE - A wiring substrate includes a wiring layer, an insulating layer formed on the wiring layer, a connection pad formed on the insulating layer, and a via conductor formed to penetrate the insulating layer, and connecting the wiring layer and the connection pad, wherein the wiring layer located under the connection pad is formed to have via receiving electrode portion whose area is smaller than an area of the connection pad, and a wiring portion separated from the via receiving electrode portion, in an area corresponding to the connection pad, and the via receiving electrode portion is connected to the connection pad via the via conductor. | 06-23-2011 |
20110266697 | ELECTRONIC PART PACKAGE - A peeling off layer | 11-03-2011 |
20120229157 | PROBE CARD AND MANUFACTURING METHOD THEREOF - In one embodiment, a probe card is provided. The probe card includes: a substrate having a first surface and a second surface opposite to the first surface; a through hole formed through the substrate and extending between the first surface and the second surface; an elastic member formed in the through hole to extend to the first surface; a through electrode formed in through hole to extend to the second surface; a first trace on a surface of the elastic member to be electrically connected to the through electrode; and a contact bump on the elastic member via the first trace to be electrically connected to the first trace, wherein the contact bump is electrically connected to an electrode pad formed on a DUT (device under test) when an electrical testing is performed on the DUT using the probe card. | 09-13-2012 |
20120319289 | SEMICONDUCTOR PACKAGE - A semiconductor package includes a semiconductor chip having plural electrode pads, and a wiring substrate having plural electrode pads to mount the semiconductor chip on the wiring substrate, wherein the plural electrode pads of the semiconductor chip include a first electrode pad, and a second electrode pad arranged on an outer periphery side of the first electrode pad, the plural electrode pads of the wiring substrate include a third electrode pad, and a fourth electrode pad arranged on an outer periphery side of the third electrode pad, the first electrode pad and the third electrode pad are connected via a first connecting portion, and the second electrode pad and the fourth electrode pad are connected via a second connecting portion including a pin. | 12-20-2012 |
20120326334 | INTERPOSER, ITS MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE - At least one embodiment provides an interposer including: a lower wiring substrate; an upper wiring substrate disposed over the lower wiring substrate via a gap; and through-electrodes which penetrate through the upper wiring substrate and the lower wiring substrate across the gap to thereby link the upper wiring substrate and the lower wiring substrate, portions of the through-electrodes being exposed in the gap. | 12-27-2012 |
20120327574 | ELECTRONIC COMPONENT - At least one embodiment provides an electronic component including: connection electrodes; and flexible electrode terminals connected to the respective connection electrodes so that spaces are formed under the respective flexible electrode terminals, each flexible electrode terminal having a main body and a connection projection provided on a top surface of the main body, each flexible electrode terminal being elastically deformable when receiving pressure. | 12-27-2012 |
20150263238 | CAP, SEMICONDUCTOR DEVICE INCLUDING THE CAP, AND MANUFACTURING METHOD THEREFOR - A cap for installing a semiconductor device that can send or receive a light having a predetermined wavelength, the cap including a recess for installing the semiconductor device, the recess being defined by a through-hole penetrating an upper surface of a silicon substrate and a lower surface of the silicon substrate, the through-hole having an upper end part of the through-hole on a side of the upper surface of the silicon substrate and a lower end part of the through-hole on a side of the lower surface of the silicon substrate, and a coating film formed to cover the upper surface of the silicon substrate and the upper end part of the through-hole, wherein the coating film that covers the upper end part of the through-hole is a window part that transmits the light having a predetermined wavelength. | 09-17-2015 |