Patent application number | Description | Published |
20090057835 | Group III nitride semiconductor and a manufacturing method thereof - A manufacturing method of a group III nitride semiconductor includes the steps of: depositing a metal layer on an AlN template substrate or an AlN single crystal substrate formed by depositing an AlN single crystal layer with a thickness of not less than 0.1 μm nor more than 10 μm on a substrate made of either one of sapphire, SiC, and Si; forming a metal nitride layer having a plurality of substantially triangular-pyramid-shaped or triangular-trapezoid-shaped microcrystals by performing a heating nitridation process on the metal layer under a mixed gas atmosphere of ammonia; and depositing a group III nitride semiconductor layer on the metal nitride layer. | 03-05-2009 |
20110254135 | III-NITRIDE SEMICONDUCTOR GROWTH SUBSTRATE, III-NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE, III-NITRIDE SEMICONDUCTOR ELEMENT, III-NITRIDE SEMICONDUCTOR FREESTANDING SUBSTRATE, AND METHOD FOR FABRICATING THESE - An object of the present invention is to address the problems described herein and to provide a III-nitride semiconductor epitaxial substrate, a III-nitride semiconductor element, and a III-nitride semiconductor freestanding substrate, which have good crystallinity, not only with AlGaN, GaN, or GaInN, the growth temperature of which is at or below 1050° C., but also with Al | 10-20-2011 |
20120061683 | GROUP III NITRIDE SEMICONDUCTOR GROWTH SUBSTRATE, GROUP III NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE, GROUP III NITRIDE SEMICONDUCTOR ELEMENT AND GROUP III NITRIDE SEMICONDUCTOR FREE-STANDING SUBSTRATE, AND METHOD OF PRODUCING THE SAME - An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with Al | 03-15-2012 |
20120248458 | VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon en” is a positive integer) having rounded corners. | 10-04-2012 |
20130137246 | METHOD OF PRODUCING GROUP III NITRIDE SEMICONDUCTOR GROWTH SUBSTRATE - An object of the present invention is to provide a method for producing a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with Al | 05-30-2013 |
20140001511 | VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME | 01-02-2014 |
20140015105 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step). | 01-16-2014 |
20140217457 | LIGHT-EMITTING ELEMENT CHIP AND MANUFACTURING METHOD THEREFOR - There is provided a light-emitting element chip which can be safely assembled and a manufacturing method therefor. A light-emitting element chip | 08-07-2014 |