Patent application number | Description | Published |
20080203517 | SEMICONDUCTOR COMPONENT HAVING RECTIFYING JUNCTIONS AND METHOD FOR PRODUCING THE SAME - A semiconductor component is proposed which has a semiconductor body having a first semiconductor zone of the first conduction type, at least one first rectifying junction with respect to the first semiconductor zone, at least one second rectifying junction with respect to the first semiconductor zone, wherein the three rectifying junctions each have a barrier height of different magnitude. | 08-28-2008 |
20080258183 | Method of manufacturing a device by locally heating one or more metallization layers and by means of selective etching - A method of manufacturing a device comprises depositing one or more metallization layers to a substrate, locally heating an area of the one or more metallization layers to obtain a substrate/metallization-layer compound or a metallization-layer compound, the compound comprising an etch-selectivity toward an etching medium which is different to that of the one or more metallization layers outside the area, and removing the one or more metallization layers in the area or outside the area, depending on the etching selectivity in the area or outside the area, by etching with the etching medium to form the device. | 10-23-2008 |
20090032848 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SAME - A method for manufacturing a semiconductor device. The method includes providing a semiconductor body of a conductivity type, wherein the semiconductor body comprises a first surface. At least one buried region of a second conductivity type is formed in the semiconductor body and at least a surface region of the second conductivity type is formed at the first surface of the semiconductor body, wherein the buried region and the surface region are formed such that they are spaced apart from each other. The buried region is formed by deep implantation of a first dopant of the second conductivity type. | 02-05-2009 |
20090068803 | METHOD FOR MAKING AN INTEGRATED CIRCUIT INCLUDING VERTICAL JUNCTION FIELD EFFECT TRANSISTORS - A method for making an integrated circuit including vertical junction field effect transistors is disclosed. One embodiment creates a vertical junction field effect transistor using a fault-tolerant or alignment-tolerant production process. The device performance is not harmed, even if misalignments in consecutive semiconductor processing steps occur. | 03-12-2009 |
20090078971 | SEMICONDUCTOR DEVICE WITH STRUCTURED CURRENT SPREAD REGION AND METHOD - A semiconductor device with structured current spread region and method is disclosed. One embodiment provides a drift portion of a first conductivity type, a current spread portion of the first conductivity type and first portions of the first conductivity type. The current spread portion and the first portions are arranged in a first plane on the drift portion, wherein the current spread portion surrounds at least partially the first portions. The semiconductor body further includes spaced apart body regions of a second conductivity type which are arranged on the current spread portion. Further, the doping concentration of the current spread portion is higher than the doping concentrations of the drift portion and of the first portions. | 03-26-2009 |
20100264467 | TRANSISTOR COMPONENT HAVING A SHIELDING STRUCTURE - A transistor component having a shielding structure. One embodiment provides a source terminal, a drain terminal and control terminal. A source zone of a first conductivity type is connected to the source terminal. A drain zone of the first conductivity type is connected to the drain terminal. A drift zone is arranged between the source zone and the drain zone. A junction control structure is provided for controlling a junction zone in the drift zone between the drain zone and the source zone, at least including one control zone. A shielding structure is arranged in the drift zone between the junction control structure and the drain zone and at least includes a shielding zone of a second conductivity type being complementarily to the first conductivity type. The shielding zone is connected to a terminal for a shielding potential. The at least one control zone and the at least one shielding zone have different geometries or different orientations in a plain that is perpendicular to a current flow direction of the component. | 10-21-2010 |
20120083098 | Method for Manufacturing a Composite Wafer Having a Graphite Core, and Composite Wafer Having a Graphite Core - According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate. | 04-05-2012 |
20120261673 | SiC Semiconductor Power Device - A semiconductor power device includes a SiC semiconductor body. At least part of the SiC semiconductor body constitutes a drift zone. A first contact is at a first side of the SiC semiconductor body. A second contact is at a second side of the SiC semiconductor body. The first side is opposite the second side. A current path between the first contact and the second contact includes at least one graphene layer. | 10-18-2012 |
20130069065 | SILICON CARBIDE MOSFET WITH HIGH MOBILITY CHANNEL - A semiconductor device may include a semiconductor body of silicon carbide (SiC) and a field effect transistor. The field effect transistor has the semiconductor body that includes a drift region. A polycrystalline silicon layer is formed over or on the semiconductor body, wherein the polycrystalline silicon layer has an average particle size in the range of 10 nm to 5 μm, and includes a source region and a body region. Furthermore, the field effect transistor includes a layer adjacent to the body region gate structure. | 03-21-2013 |
20130161801 | Module Including a Discrete Device Mounted on a DCB Substrate - A module includes a DCB substrate and a discrete device mounted on the DCB substrate, wherein the discrete device comprises a leadframe, a semiconductor chip mounted on the leadframe and an encapsulation material covering the semiconductor chip. | 06-27-2013 |
20130193449 | PRODUCTION OF AN INTEGRATED CIRCUIT INCLUDING ELECTRICAL CONTACT ON SiC - Production of an integrated circuit including an electrical contact on SiC is disclosed. One embodiment provides for production of an electrical contact on an SiC substrate, in which a conductive contact is produced on a boundary surface of the SiC substrate by irradiation and absorption of a laser pulse on an SiC substrate. | 08-01-2013 |
20140264374 | METHOD FOR MANUFACTURING A SILICON CARBIDE SUBSTRATE FOR AN ELECTRICAL SILICON CARBIDE DEVICE, A SILICON CARBIDE SUBSTRATE AND AN ELECTRICAL SILICON CARBIDE DEVICE - A method for manufacturing a silicon carbide substrate for an electrical silicon carbide device includes providing a silicon carbide dispenser wafer including a silicon face and a carbon face and depositing a silicon carbide epitaxial layer on the silicon face. Further, the method includes implanting ions with a predefined energy characteristic forming an implant zone within the epitaxial layer, so that the ions are implanted with an average depth within the epitaxial layer corresponding to a designated thickness of an epitaxial layer of the silicon carbide substrate to be manufactured. Furthermore, the method comprises bonding an acceptor wafer onto the epitaxial layer so that the epitaxial layer is arranged between the dispenser wafer and the acceptor wafer. Further, the epitaxial layer is split along the implant zone so that a silicon carbide substrate represented by the acceptor wafer with an epitaxial layer with the designated thickness is obtained. | 09-18-2014 |
20140291695 | Silicon Carbide Device and a Method for Manufacturing a Silicon Carbide Device - A silicon carbide device includes an epitaxial silicon carbide layer including a first conductivity type and a buried lateral silicon carbide edge termination region located within the epitaxial silicon carbide layer including a second conductivity type. The buried lateral silicon carbide edge termination region is covered by a silicon carbide surface layer including the first conductivity type. | 10-02-2014 |
20140291697 | SILICON CARBIDE DEVICE AND A METHOD FOR FORMING A SILICON CARBIDE DEVICE - A silicon carbide device includes a silicon carbide substrate, an inorganic passivation layer structure and a molding material layer. The inorganic passivation layer structure laterally covers at least partly a main surface of the silicon carbide substrate and the molding material layer is arranged adjacent to the inorganic passivation layer structure. | 10-02-2014 |
20140312310 | Semiconductor Power Device - A vertical semiconductor power field effect transistor device includes a SiC semiconductor body, at least part of the SiC semiconductor body constituting a drift zone, a first contact at a first side of the SiC semiconductor body, the first contact being a contact to one of a source and drain of the field effect transistor device, a second contact at a second side of the SiC semiconductor body, the first side being opposite the second side, the second contact being a contact to the other one of the source and drain, and a current path between the first contact and the second contact and which includes at least one graphene layer. A lateral channel region at the first side includes the at least one graphene layer. | 10-23-2014 |
20140335676 | METHOD FOR MANUFACTURING A COMPOSITE WAFER HAVING A GRAPHITE CORE, AND COMPOSITE WAFER HAVING A GRAPHITE CORE - According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate. | 11-13-2014 |
20140353667 | Semiconductor Device and Manufacturing Method Therefor - A field-effect semiconductor device having a semiconductor body with a main surface is provided. The semiconductor body includes, in a vertical cross-section substantially orthogonal to the main surface, a drift layer of a first conductivity type, a semiconductor mesa of the first conductivity type adjoining the drift layer, substantially extending to the main surface and having two side walls, and two second semiconductor regions of a second conductivity type arranged next to the semiconductor mesa. Each of the two second semiconductor regions forms a pn-junction at least with the drift layer. A rectifying junction is formed at least at one of the two side walls of the mesa. Further, a method for producing a heterojunction semiconductor device is provided. | 12-04-2014 |
20150041831 | PRODUCTION OF AN INTEGRATED CIRCUIT INCLUDING ELECTRICAL CONTACT ON SiC - Production of an integrated circuit including an electrical contact on SiC is disclosed. One embodiment provides for production of an electrical contact on an SiC substrate, in which a conductive contact is produced on a boundary surface of the SiC substrate by irradiation and absorption of a laser pulse on an SiC substrate. | 02-12-2015 |
20150069411 | SEMICONDUCTOR DEVICE, JUNCTION FIELD EFFECT TRANSISTOR AND VERTICAL FIELD EFFECT TRANSISTOR - A semiconductor device according to an embodiment is at least partially arranged in or on a substrate and includes a recess forming a mesa, wherein the mesa extends along a direction into the substrate to a bottom plane of the recess and includes a semiconducting material of a first conductivity type, the semiconducting material of the mesa including at least locally a first doping concentration not extending further into the substrate than the bottom plane. The semiconductor device further includes an electrically conductive structure arranged at least partially along a sidewall of the mesa, the electrically conductive structure forming a Schottky or Schottky-like electrical contact with the semiconducting material of the mesa, wherein the substrate comprises the semiconducting material of the first conductivity type comprising at least locally a second doping concentration different from the first doping concentration along a projection of the mesa into the substrate. | 03-12-2015 |