Patent application number | Description | Published |
20080243675 | High Speed Processing of Financial Information Using FPGA Devices - Methods and systems for processing financial market data using reconfigurable logic are disclosed. Various functional operations to be performed on the financial market data can be implemented in firmware pipelines to accelerate the speed of processing. Also, a combination of software logic and firmware logic can be used to efficiently control and manage the high speed flow of financial market data to and from the reconfigurable logic. | 10-02-2008 |
20110178911 | High Speed Processing of Financial Information Using FPGA Devices - Methods and systems for processing financial market data using reconfigurable logic are disclosed. Various functional operations to be performed on the financial market data can be implemented in firmware pipelines to accelerate the speed of processing. Also, a combination of software logic and firmware logic can be used to efficiently control and manage the high speed flow of financial market data to and from the reconfigurable logic. | 07-21-2011 |
20110178912 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) process each received financial market data message to update a stored record for the financial instrument associated with that message. | 07-21-2011 |
20110178917 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to map the symbols present in the financial market data messages to another symbology. | 07-21-2011 |
20110178918 | High Speed Processing of Financial Information Using FPGA Devices - A high speed system and method for processing financial instrument order data are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to monitor a financial instrument order based on a risk profile to determine whether the order is appropriate. If determined appropriate, a financial instrument order can be routed to a trading venue. With respect to another exemplary embodiment, a reconfigurable logic device is employed to maintain a financial instrument order book. | 07-21-2011 |
20110178919 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) process streaming financial market data, the streaming financial market data comprising a plurality of messages representative of a plurality of offers to buy and sell a plurality of financial instruments, and (2) maintain in real-time a plurality of financial instrument order books based on the messages | 07-21-2011 |
20110178957 | High Speed Processing of Financial Information Using FPGA Devices - Methods and systems for processing financial market data using a reconfigurable logic device are disclosed. Various operations such as basket calculation and volume weighted average price (VWAP) operations can be performed on the financial market data using firmware logic deployed on the reconfigurable logic device to accelerate the speed of processing. | 07-21-2011 |
20110179050 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) parse each received financial market data message into its constituent data fields. | 07-21-2011 |
20110184844 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a record memory is employed to store a plurality of records for a plurality of financial instruments, and a reconfigurable logic device is employed to (1) receive financial market data messages, (2) retrieve from the record memory the records for the messages' associated financial instruments, (3) process each received financial market data message to update the record for the financial instrument associated with that message, and wherein each record comprises an interest list that identifies whether any of a plurality of entities have expressed an interest in being notified of data relating to the updated record. | 07-28-2011 |
20110252008 | Intelligent Data Storage and Processing Using FPGA Devices - Methods and apparatuses for processing data are disclosed, including methods and apparatuses that leverage a reconfigurable logic device to offload decompression and search operations from a processor to thereby enable high speed data searches within data that has been stored in a compressed format. | 10-13-2011 |
20120109849 | Intelligent Data Storage and Processing Using FPGA Devices - A re-configurable logic device such as a field programmable gate array (FPGA) can be used to deploy a data processing pipeline, the pipeline comprising a plurality of pipelined data processing engines, the plurality of pipelined data processing engines including a data reduction engine, the plurality of pipelined data processing engines being configured to perform processing operations, wherein the pipeline comprises a multi-functional pipeline, and wherein the re-configurable logic device is further configured to controllably activate or deactivate each of the pipelined data processing engines in the pipeline in response to control instructions and thereby define a function for the pipeline, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline. | 05-03-2012 |
20120110316 | Intelligent Data Storage and Processing Using FPGA Devices - A re-configurable logic device such as a field programmable gate array (FPGA) can be used to deploy a data processing pipeline, the pipeline comprising a plurality of pipelined data processing engines, the plurality of pipelined data processing engines being configured to perform processing operations, wherein the pipeline comprises a multi-functional pipeline, and wherein the re-configurable logic device is further configured to controllably activate or deactivate each of the pipelined data processing engines in the pipeline in response to control instructions and thereby define a function for the pipeline, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline. | 05-03-2012 |
20120116998 | Method and Apparatus for Processing Financial Information at Hardware Speeds Using FPGA Devices - A method and apparatus use a reconfigurable logic device to process a stream of financial information at hardware speeds. The reconfigurable logic device can be configured to perform data processing operations on the financial information stream. Examples of such data processing operations include data processing operations to compute a latest stock price, a minimum stock price, and a maximum stock price. | 05-10-2012 |
20120130922 | Method and Apparatus for Processing Financial Information at Hardware Speeds Using FPGA Devices - A method and apparatus use hardware logic deployed on a reconfigurable logic device to process a stream of financial information at hardware speeds. The hardware logic can be configured to perform data reduction operations on the financial information stream. Examples of such data reductions operations include data processing operations to compute a latest stock price, a minimum stock price, and a maximum stock price. | 05-24-2012 |
20130148802 | Method and System for High Throughput Blockwise Independent Encryption/Decryption - An encryption technique is disclosed for encrypting a plurality of data blocks of a data segment where the encryption selectively switches between a blockwise independent randomized (BIR) encryption mode and a cipher block chaining (CBC) encryption mode based on a configurable feedback stride. A corresponding decryption technique is also disclosed. | 06-13-2013 |
20130290163 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing financial instrument order books are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to synthesize quote events associated with a plurality of financial instruments from a financial market data feed. | 10-31-2013 |
20140040109 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to generate a plurality of financial market data messages from a plurality of the data fields, each generated message having a specified message format. | 02-06-2014 |
20140089163 | High Speed Processing of Financial Information Using FPGA Devices - Methods and systems for processing financial market data using a reconfigurable logic device are disclosed. Various operations such as volume weighted average price (VWAP) operations can be performed on the financial market data using firmware logic deployed on the reconfigurable logic device to accelerate the speed of processing. | 03-27-2014 |
20140164215 | High Speed Processing of Financial Information Using FPGA Devices - A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to map the symbols present in the financial market data messages to another symbology. | 06-12-2014 |
20140310717 | Intelligent Data Storage and Processing Using FPGA Devices - A re-configurable logic device such as a field programmable gate array (FPGA) can be used to deploy a data processing pipeline, the pipeline comprising a plurality of pipelined data processing engines, the plurality of pipelined data processing engines being configured to perform processing operations, wherein the pipeline comprises a multi-functional pipeline, and wherein the re-configurable logic device is further configured to controllably activate or deactivate each of the pipelined data processing engines in the pipeline in response to control instructions and thereby define a function for the pipeline, each pipeline function being the combined functionality of each activated pipelined data processing engine in the pipeline. | 10-16-2014 |
20150055776 | Method and System for High Throughput Blockwise Independent Encryption/Decryption - An encryption technique is disclosed for encrypting a plurality of data blocks of a data segment where the encryption selectively switches between a blockwise independent randomized (BIR) encryption mode and a cipher block chaining (CBC) encryption mode based on a configurable feedback stride. A corresponding decryption technique is also disclosed. | 02-26-2015 |