Patent application number | Description | Published |
20090021614 | Position relationships associated with image capturing devices - A method for determining a plurality of spatial relationships associated with a plurality of image capturing devices is disclosed. In one embodiment, the present method acquires sets of a plurality of source images from a plurality of image capturing devices. The present method then determines a plurality of transforms for each such set of source images for combining the acquired source images into a plurality of seamless images. The present method then determines a plurality of relative positions associated with the plurality of image capturing devices based on the plurality of transforms The present method then determines a plurality of spatial relationships associated with the plurality of image capturing devices based on the transforms and plurality of relative positions associated with the plurality of image capturing devices. | 01-22-2009 |
20090103854 | Photonic interconnects for computer system devices - Various embodiments of the present invention are directed to photonic interconnects that can be used for on-chip as well as off-chip communications between computer system components. In one embodiment of the present invention, a photonic interconnect comprises a plurality of on-chip waveguides. Additionally, the photonic interconnect may include a plurality of off-chip waveguides, and at least one optoelectronic converter. The at least one optoelectronic converter can be photonically coupled to a portion of the plurality of on-chip waveguides, can be photonically coupled to a portion of the plurality of off-chip waveguides, and is in electronic communication with at least one computer system component. | 04-23-2009 |
20090274413 | Photonic interconnects for computer system devices - Various embodiments of the present invention are directed to photonic interconnects that can be used for on-chip as well as off-chip communications between computer system components. In one embodiment of the present invention, a photonic interconnect comprises a plurality of on-chip waveguides. Additionally, the photonic interconnect may include a plurality of off-chip waveguides, and at least one optoelectronic converter. The at least one optoelectronic converter can be photonically coupled to a portion of the plurality of on-chip waveguides, can be photonically coupled to a portion of the plurality of off-chip waveguides, and is in electronic communication with at least one computer system component. | 11-05-2009 |
20100080391 | Auditing Data Integrity - Various approaches are described for auditing integrity of stored data. In one approach, a data set is provided from a client to a storage provider, and the data set is stored at a first storage arrangement by the storage provider. An auditor determines whether the data set stored at the first storage arrangement is corrupt without reliance on any part of the data set and any derivative of any part of the data set stored by the client. While the auditor is determining whether the data set stored at the first storage arrangement is corrupt, the auditor is prevented from being exposed to information specified by the data set. The auditor outputs data indicative of data corruption in response to determining that the data set stored at the first storage arrangement is corrupt. | 04-01-2010 |
20110280569 | Integrated Circuit With Optical Interconnect - The present invention provides one or more embodiments of an optical interconnect design suitable for providing communication between computer system components in a computer system device. The optical interconnect ( | 11-17-2011 |
20120020242 | METHODS AND APPARATUS TO DETERMINE AND IMPLEMENT MULTIDIMENSIONAL NETWORK TOPOLOGIES - Methods and apparatus to determine and implement multidimensional network topologies are disclosed. An example method disclosed herein comprises receiving an input parameter for determining a multidimensional network topology for a network interconnecting a plurality of devices, and determining a set of multidimensional network topologies, each multidimensional network topology of the set comprising a respective plurality of nodes to interconnect the plurality of devices, each node in each multidimensional network topology of the set being fully connected with all neighbor nodes in each dimension of the multidimensional network topology, and each multidimensional network topology of the set satisfying a first constraint based on the input parameter. | 01-26-2012 |
20120098757 | SYSTEM AND METHOD UTILIZING BOUNDARY SENSORS FOR TOUCH DETECTION - sensors are arranged continuously adjacent along the boundary region of a touch surface. Furthermore, a touch associated with the interior area of the touch surface is detected via at least a plurality of sensors along the boundary region. | 04-26-2012 |
20120120468 | FAIR TOKEN ARBITRATION SYSTEMS AND METHODS - Various embodiments of the present invention are directed to arbitration systems and methods. In one embodiment, an arbitration system comprises a loop-shaped arbitration waveguide ( | 05-17-2012 |
20120151460 | Procedural Concurrency Graph Generator - A parallel-code optimization system includes a Procedural Concurrency Graph (PCG) generator. The PCG generator produces an initial PCG of a computer program including parallel code, and determines a refined PCG from the initial PCG by applying concurrency-type refinements and interference-type refinements to the initial PCG. The initial PCG and the refined PCG include nodes and edges connecting pairs of the nodes. The nodes represent defined procedures in the parallel code, and each edge represents a may-happen-in-parallel relation, and is associated with a set of lvalues that represents the immediate interference between the corresponding pair of nodes. | 06-14-2012 |
20120151462 | Sequential-Code Optimization of Parallel Code Based on Identifying Siloed Program References - A parallel-code optimization system includes a siloed program reference-identifier and an intermediate representation (IR) updater. The siloed program reference identifier determines siloed program references in parallel code, wherein siloed program references are free of cross-thread interference. The IR updater modifies data-flow abstractions based on the identified siloed program references. | 06-14-2012 |
20130109419 | DETERMINATION OF MAXIMAL INDEPENDENT SETS OF MOBILE DEVICES | 05-02-2013 |