Patent application number | Description | Published |
20100082898 | Methods to securely bind an encryption key to a storage device - Embodiments of methods to securely bind a disk cache encryption key to a cache device are generally described herein. Other embodiments may be described and claimed. | 04-01-2010 |
20110145478 | METHOD TO IMPROVE A SOLID STATE DISK PERFORMANCE BY USING A PROGRAMMABLE BUS ARBITER - A method to improve a solid state disk performance by using a programmable bus arbiter is generally presented. In this regard, in one embodiment, a method is introduced comprising delaying a request from a solid state drive for access to an interface for a time to allow a host to access the interface to transmit a command to the solid state drive. Other embodiments are described and claimed. | 06-16-2011 |
20130086313 | METHODS TO SECURELY BIND AN ENCRYPTION KEY TO A STORAGE DEVICE - Embodiments of methods to securely bind a disk cache encryption key to a cache device are generally described herein. Other embodiments may be described and claimed. | 04-04-2013 |
20130275781 | MECHANISM FOR FACILITATING POWER AND PERFORMANCE MANAGEMENT OF NON-VOLATILE MEMORY IN COMPUTING DEVICES - A mechanism is described for facilitating power governance of non-volatile memory devices using a power governing mechanism employed at a computing device according to one embodiment of the invention. A method of embodiments of the invention includes maintaining a credit pool having a plurality of credits to be released to a plurality of memory channels associated with a plurality of non-volatile memory devices. The plurality of credits may be used to provide sufficient power to perform memory operations associated with a computing device. The method may further include receiving a credit request having a petition to obtain one or more credits for a memory channel of the plurality of memory channels to facilitate performance of a memory operation, determining whether the one or more credits are available in the credit pool, and retrieving the one or more credits from the credit pool, if the one or more credits are available in the credit pool. The method may further include releasing the one or more credits to the memory channel. The one or more released credits are used to perform the memory operation. | 10-17-2013 |
20140003145 | ARCHITECTURES AND TECHNIQUES FOR PROVIDING LOW-POWER STORAGE MECHANISMS | 01-02-2014 |
20140095767 | STORAGE DEVICE TRIMMING - In an embodiment, a command that specifies a logical block to trim in a storage device is acquired. An entry in a logical-to-physical address (L2P) table that contains a physical address that corresponds to the logical block may be set to point to an invalid address. A trim token that specifies the logical block may be generated. The trim token may be stored in a non-volatile storage contained in the storage device. | 04-03-2014 |
20140223231 | SOLID STATE DRIVE MANAGEMENT IN POWER LOSS RECOVERY - Embodiments of the present disclosure describe devices, methods, computer-readable media and systems configurations for solid state drive management in power loss recovery. Other embodiments may be described and/or claimed. | 08-07-2014 |
20140359196 | ON-THE-FLY PERFORMANCE ADJUSTMENT FOR SOLID STATE STORAGE DEVICES - Methods and apparatus related to on-the-fly performance adjustment techniques for solid state storage devices are described. In one embodiment, a controller logic controls access to one or more non-volatile memory devices. The controller logic causes a change in an operational frequency of one or more of: the controller logic, a bus that couples the one or more non-volatile memory devices to the controller logic, and one or more of the one or more non-volatile memory devices. Also, the controller logic is capable of causing the change in the operational frequency in response to a command. Furthermore, changing power limits is made possible to scale solid state storage device performance based on system capabilities. Other embodiments are also disclosed and claimed. | 12-04-2014 |
20150032936 | Techniques for Identifying Read/Write Access Collisions for a Storage Medium - Examples are disclosed for identifying read/write access collisions for a storage medium. In some examples, a plurality of write access requests for access to a storage medium may be received at a controller for a storage medium. The plurality of write access requests may be associated with separate logical block address (LBA) ranges. The separate write LBA ranges may be stored to sets of first registers. A read access request to the storage medium may also be received and a read LBA range associated with the read access request may be stored to a set of second registers. The separate stored write LBA ranges may then be compared to the read LBA range to identify overlapping ranges that may indicate read/write access collisions to the storage medium. Other examples are described and claimed. | 01-29-2015 |