Patent application number | Description | Published |
20080236619 | COBALT CAPPING SURFACE PREPARATION IN MICROELECTRONICS MANUFACTURE - Cleaning compositions and methods in connection with cobalt-based capping of interconnects in integrated circuit semiconductor devices. | 10-02-2008 |
20080254205 | SELF-INITIATED ALKALINE METAL ION FREE ELECTROLESS DEPOSITION COMPOSITION FOR THIN CO-BASED AND NI-BASED ALLOYS - A method and composition for electrolessly depositing a layer of a metal alloy onto a surface of a metal substrate in manufacture of microelectronic devices. The composition comprises a source of metal deposition ions, a borane-based reducing agent, and a two-component stabilizer, wherein the first stabilizer component is a source of hypophosphite and the second stabilizer component is a molybdenum (VI) compound. | 10-16-2008 |
20090035940 | COPPER METALLIZATION OF THROUGH SILICON VIA - A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate comprising immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition comprising a source of copper ions, an organic sulfonic acid or inorganic acid, or one or more organic compounds selected from among polarizers and/or depolarizers, and chloride ions. | 02-05-2009 |
20090155468 | METROLOGY IN ELECTROLESS COBALT PLATING - Electrolessly depositing a cobalt-based alloy on a metal surface of a substrate in a process which involves monitoring for Co | 06-18-2009 |
20100075496 | SURFACE PREPARATION PROCESS FOR DAMASCENE COPPER DEPOSITION - A method is disclosed for metallizing a substrate comprising an interconnect feature in the manufacture of a microelectronic device, wherein the interconnect feature comprises a bottom, a sidewall, and a top opening having a diameter, D. The method comprises the following steps: depositing a barrier layer on the bottom and the sidewall of the interconnect feature, the barrier layer comprising a metal selected from the group consisting of ruthenium, tungsten, tantalum, titanium, iridium, rhodium, and combinations thereof; contacting the substrate comprising the interconnect feature comprising the bottom and sidewall having the barrier layer thereon with an aqueous composition comprising a reducing agent and a surfactant; and depositing copper metal onto the bottom and the sidewall of the interconnect feature having the barrier layer thereon. | 03-25-2010 |
20100126872 | ELECTRODEPOSITION OF COPPER IN MICROELECTRONICS WITH DIPYRIDYL-BASED LEVELERS - A method for metallizing a via feature in a semiconductor integrated circuit device substrate, wherein the semiconductor integrated circuit device substrate comprises a front surface, a back surface, and the via feature and wherein the via feature comprises an opening in the front surface of the substrate, a sidewall extending from the front surface of the substrate inward, and a bottom. The method comprises contacting the semiconductor integrated circuit device substrate with an electrolytic copper deposition chemistry comprising (a) a source of copper ions and (b) a leveler compound, wherein the leveler compound is a reaction product of a dipyridyl compound and an alkylating agent; and supplying electrical current to the electrolytic deposition chemistry to deposit copper metal onto the bottom and sidewall of the via feature, thereby yielding a copper filled via feature. | 05-27-2010 |
20100285660 | COPPER DEPOSITION FOR FILLING FEATURES IN MANUFACTURE OF MICROELECTRONIC DEVICES - A method for plating copper onto a semiconductor integrated circuit device substrate by forming an initial metal deposit in the feature which has a profile comprising metal on the bottom of the feature and a segment of the sidewalls having essentially no metal thereon, electrolessly depositing copper onto the initial metal deposit to fill the feature with copper. A method for plating copper onto a semiconductor integrated circuit device substrate by forming a deposit comprising a copper wettable metal in the feature, forming a copper-based deposit on the top-field surface, and depositing copper onto the deposit comprising the copper wettable metal to fill the feature with copper. | 11-11-2010 |
20120043218 | COPPER ELECTRODEPOSITION IN MICROELECTRONICS - A method and composition for electroplating Cu onto a substrate in the manufacture of a microelectronic device involving and electrolytic solution containing a source of Cu ions and a substituted pyridyl polymer compound for leveling. | 02-23-2012 |
20130199935 | COPPER FILLING OF THROUGH SILICON VIAS - A method for metallizing a through silicon via feature in a semiconductor integrated circuit device substrate. The method comprises immersing the semiconductor integrated circuit device substrate into an electrolytic copper deposition composition, wherein the through silicon via feature has an entry dimension between 1 micrometers and 100 micrometers, a depth dimension between 20 micrometers and 750 micrometers, and an aspect ratio greater than about 2:1; and supplying electrical current to the electrolytic deposition composition to deposit copper metal onto the bottom and sidewall for bottom-up filling to thereby yield a copper filled via feature. The deposition composition comprises (a) a source of copper ions; (b) an acid selected from among an inorganic acid, organic sulfonic acid, and mixtures thereof; (c) an organic disulfide compound; (d) a compound selected from the group consisting of a reaction product of benzyl chloride and hydroxyethyl polyethyleneimine, a quaternized dipyridyl compound, and a combination thereof; and (d) chloride ions. | 08-08-2013 |
20130241060 | METHOD AND COMPOSITION FOR ELECTRODEPOSITION OF COPPER IN MICROELECTRONICS WITH DIPYRIDYL-BASED LEVELERS - A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound. | 09-19-2013 |
20140102909 | COPPER ELECTRODEPOSITION IN MICROELECTRONICS - A method and composition for electroplating Cu onto a substrate in the manufacture of a microelectronic device involving and electrolytic solution containing a source of Cu ions and a quaternized pyridinium salt compound for leveling. | 04-17-2014 |
20140322912 | METHOD AND COMPOSITION FOR ELECTRODEPOSITION OF COPPER IN MICROELECTRONICS WITH DIPYRIDYL-BASED LEVELERS - A method and composition for metallizing a via feature in a semiconductor integrated circuit device substrate, using a leveler compound which is a dipyridyl compound. | 10-30-2014 |