Reinman
Glenn Reinman, Los Angeles, CA US
Patent application number | Description | Published |
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20140044157 | MULTI-BAND INTERCONNECT FOR INTER-CHIP AND INTRA-CHIP COMMUNICATIONS - Systems, apparatus, modules, and methods of communicating with memory devices utilizing multi-band communication containing a baseband and one or more amplitude shift keyed (ASK) RF channels over each differential pair of off-chip transmission lines. Configurations are described for interfacing between microprocessors, or controllers and memory devices or modules, and within a DIMM and its DRAM devices, and between multiple DIMM memory modules. | 02-13-2014 |
Grant L. Reinman, Farmington, CT US
Patent application number | Description | Published |
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20140324363 | SYSTEM RELIABILITY ANALYSIS AND MANAGEMENT USING PHYSICS-BASED MODELS EMBEDDED IN A BAYSIAN NETWORK - A method for assessing reliability in a gas turbine engine system includes using a processor to carry out instructions from a memory to propagate a physics-based model through a Bayesian network to assess reliability for the gas turbine engine system. A system for assessing reliability for a gas turbine engine system includes a memory including instructions to propagate a physics-based model through a Bayesian network to assess reliability for a gas turbine engine system. The system also includes a processor operatively connected to the memory to carry out the instructions. A network interface can be operatively connected to the processor to receive reliability data from operation of gas turbine engines, wherein the memory includes instructions for updating data module or modules based on reliability data. | 10-30-2014 |
Tzachy Reinman, Elazar IL
Patent application number | Description | Published |
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20150358160 | SECRETS RENEWABILITY - A method, system and apparatus for deriving a secondary secret from a root secret are described, the method, system and apparatus including reserving a memory buffer included in an integrated circuit, the memory buffer being large enough to contain all of the bits which will include the secondary secret, receiving a plurality of bits from a root secret, the root secret being stored in a secure memory of the integrated circuit, inputting the plurality of bits from the root secret and at least one control bit into a permutation network, and thereby producing a multiplicity of output bits, the at least one control bit including one of one bit of a value g, and one bit an output of a function which receives g as an input, receiving the multiplicity of output bits from the permutation network, inputting the multiplicity of output bits from the permutation network into a plurality of logic gates, thereby combining the multiplicity of output bits, wherein a fixed number of bits is output from the logic gates, inputting the fixed number of bits output by the logic gates into an error correcting code module, the fixed number of bits output by the logic gates including a first group of intermediate output bits and a second group of intermediate output bits and receiving output bits from the error correcting code module, the output bits of the error correcting code module including the first group of intermediate output bits as changed by the error correcting code module, where the change depends on the second group of intermediate output bits, filling non-filled registers in the reserved memory buffer with the first group of intermediate output bits as changed by the error correcting code module, and repeating the steps of “receiving a plurality of bits from a root secret” through “filling non-filled registers in the reserved memory buffer” until the entire secondary secret is derived, wherein the steps of “receiving a plurality of bits from a root secret” through “filling non-filled registers in the reserved memory buffer” are performed in a single clock cycle of the integrated circuit. Related apparatus, methods and systems are also described. | 12-10-2015 |
William A. Reinman, Modesto, CA US
Patent application number | Description | Published |
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20120246918 | Electromagnet battery handler - A device to transfer a tiny hearing aid battery to the battery compartment of a hearing aid. Pressure on a button at the top creates contact to a single AAA battery, thus energizing an electromagnet which then holds the hearing aid battery. When the pressure at the devices's top button is released, the AAA battery is turned off and the battery is released undisturbed in the hearing aid's battery compartment. | 10-04-2012 |