Patent application number | Description | Published |
20130063315 | METHODS AND APPARATUS FOR DETERMINING PARAMETERS OF AN ARRAY - Methods and apparatus for determining parameters for an array are described. An exemplary embodiment of a method determines a set of parameters for an antenna array including multiple array elements, the array being fed by a feed array including a plurality of feed elements. The embodiment of the method includes measuring a plurality of bistatic ranges R | 03-14-2013 |
20130068436 | SCALEABLE PARALLEL FLOW MICRO-CHANNEL HEAT EXCHANGER AND METHOD FOR MANUFACTURING SAME - Provided is a heat exchanger, heat sink or coldwall having a machined manifold for receiving a plurality of individual, modular micro-channel heat exchanger elements. The manifold further includes a parallel flow network or flow distribution network for distributing a cooling fluid uniformly to all micro-channel heat exchanger elements. Each micro-channel heat exchanger element is individually manufactured and tested prior to integration with the manifold. The design of the micro-channel heat exchanger elements may include a straight fin, a high density fin, lanced offset fin, and perforated offset layers fin configurations. | 03-21-2013 |
20130100677 | LIGHTING STRUCTURE - An improved light fixture is disclosed. One embodiment comprises a light source, a first optical element that focuses light provided by a light source in the forward direction, a second optical element that reflects light in the reverse direction, and a third optical element that focuses light in the forward direction. | 04-25-2013 |
20130103929 | COUPLING PROCESSORS TO EACH OTHER FOR HIGH PERFORMANCE COMPUTING (HPC) - A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard. | 04-25-2013 |
20130104138 | SYSTEM AND METHOD FOR TOPOLOGY-AWARE JOB SCHEDULING AND BACKFILLING IN AN HPC ENVIRONMENT - A method for job management in an HPC environment includes determining an unallocated subset from a plurality of HPC nodes, with each of the unallocated HPC nodes comprising an integrated fabric. An HPC job is selected from a job queue and executed using at least a portion of the unallocated subset of nodes. | 04-25-2013 |
20130104232 | APPLIQUE PROVIDING A SECURE DEPLOYMENT ENVIRONMENT (SDE) FOR A WIRELESS COMMUNICATIONS DEVICE - A security appliqué provides a secure deployment environment (SDE) for a wireless communications device. The Security appliqué isolates the security features, requirements, and information security boundaries such that no hardware modifications are required to a wireless communications device. Rather, a security module thin client is provided to the wireless communications device to provide the Secure Deployment Environment (SDE). The wireless communications device is coupled to the security appliqué via the standard connection interface. Through the standard connection interface, the security appliqué provides the SDE for the wireless communications device without implementing modifications to the wireless communications device. | 04-25-2013 |
20130111738 | SYSTEMS AND METHODS FOR PROVIDING HIGH-CAPACITANCE RF MEMS SWITCHES - Systems and methods for providing high-capacitive RF MEMS switches are provided. In one embodiment, the invention relates to a micro-electro-mechanical switch assembly including a substrate, an electrode disposed on a portion of the substrate, a dielectric layer disposed on at least a portion of the electrode, a metal layer disposed on at least a portion of the dielectric layer, and a flexible membrane having first and second ends supported at spaced locations on the substrate base, where the flexible membrane is configured to move from a default position to an actuated position in response to a preselected switching voltage applied between the flexible membrane and the electrode, and where, in the actuated position, the flexible membrane is in electrical contact with the metal layer. | 05-09-2013 |
20130121443 | QUADRATURE MODULATOR BALANCING SYSTEM - A method of balancing a quadrature modulator includes exciting an in-phase input of the quadrature module and sweeping a phase of an injection signal through a range of degrees, and determining a plurality of in-phase DC components. The method further includes exciting a quadrature input of the quadrature module and sweeping a phase of the injection signal through the range of degrees, and determining a plurality of quadrature DC components. An in-phase sinusoidal equivalent of the plurality of in-phase DC components and a quadrature sinusoidal equivalent of the plurality of quadrature DC components may be determined. At least one correction factor that balances the quadrature modulator may be determined based on a comparison between the in-phase sinusoidal equivalent and the quadrature sinusoidal equivalent. | 05-16-2013 |
20130127014 | HERMETIC PACKAGING OF INTEGRATED CIRCUIT COMPONENTS - A method for forming an integrated circuit includes transforming at least a portion of a first substrate layer to form a conductive region within the first substrate layer. An integrated circuit device is provided proximate an outer surface of the first substrate layer. The integrated circuit device transmits or receives electrical signals through the conductive region. A second substrate layer is disposed proximate to the outer surface of the first substrate layer to enclose the integrated circuit device in a hermetic environment. | 05-23-2013 |
20130161699 | SEMICONDUCTOR STRUCTURES HAVING NUCLEATION LAYER TO PREVENT INTERFACIAL CHARGE FOR COLUMN III-V MATERIALS ON COLUMN IV OR COLUMN IV-IV MATERIALS - A semiconductor structure having: a column IV material or column IV-IV material; a nucleation layer of AlN layer or a column HI nitride having more than 60% aluminum content on a surface of the column IV material or column INT-IV material and a layer of column III-V material over the nucleation layer, where the nucleation layer and the layer of column III-V material over the nucleation layer have different crystallographic structures. In one embodiment, the columnffl V nucleation layer is a nitride and the column III-V material of the over the nucleation layer is a non-nitride such as, for example, an arsenide (e.g., GaAs), a phosphide (e.g, InP) or an antimonide (e.g. InSb), or alloys thereof. | 06-27-2013 |
20130162366 | WIDEBAND, DIFFERENTIAL SIGNAL BALUN FOR REJECTING COMMON MODE ELECTROMAGNETIC FIELDS - Provided are assemblies and processes for efficiently coupling wideband differential signals between balanced and unbalanced circuits. The assemblies include a broadband balun having an unbalanced transmission line portion, a balanced transmission line portion, and a transition region disposed between the unbalanced and balanced transmission line portions. The unbalanced transmission line portion includes at least one ground and a pair of conductive signal traces, each isolated from ground. The balanced portion does not include an analog ground. The transition region effectively terminates the analog ground, while also smoothly transitioning or otherwise shaping transverse electric field distributions between the balanced and unbalanced portions. Beneficially, the balun is free from resonant features that would otherwise limit operating bandwidth, allowing it to operate over a wide bandwidth of 10:1 or greater. Assemblies can include RF chokes with back-to-back baluns, and other elements, such as balanced filters, and also can be implemented as integrated circuits. | 06-27-2013 |
20130165546 | X-RAY OPAQUE COATING - The disclosure relates to an X-ray opaque coating containing an epoxy resin including an iodinated phenol covalently bonded to a glycidyl ether. Iodinated phenol covalently bonded to a glycidyl ether may include iodinated bisphenol A, such as tetraiodobisphenol A, a glycidyl ether of mono-iodophenol, bis-iodephenol, tri-iodophenol, or combinations thereof. The coating may include an X-ray opaque inorganic filler. The disclosure also relates to an electronic component including a substrate and at last one device coupled to the substrate with an obfuscation layer disposed over the substrate for obscuring the device from an X-ray source. The obfuscation layer may include an X-ray opaque coating. The disclosure additionally relates to- a method of obscuring at least a portion of an electronic component by depositing an obfuscation layer that may includes m X-ray opaque coating and a method of forming an X-ray opaque coating. | 06-27-2013 |
20130167589 | FUSED SILICA BODY WITH VITREOUS SILICA INNER LAYER AND METHOD FOR MAKING THE SAME - A fused silica body comprising a layer of vitreous silica adjacent at least a portion of an inner surface is described in embodiments herein. In other embodiments, a method of making a fused silica body with a layer of vitreous silica adjacent at least a portion of an inner surface is described herein, comprising heating at least a portion of the inner surface to the point of vitrification. In certain embodiments, the method involves passing a linear local heat source over the inner surface in a particular manner, such as a helical fashion transverse to the linear shape, and may involve creating on the inner surface of the body overlapping swaths of temporarily melted silica material. | 07-04-2013 |
20130177878 | SCIENCE, TECHNOLOGY, ENGINEERING AND MATHEMATICS BASED CYBER SECURITY EDUCATION SYSTEM - According to one aspect, a science, technology, engineering and mathematics (STEM) based cyber security education system is provided. A training component, a knowledge component, and a collaborative component are interfaced to a distance learning component to form a STEM-based cyber security education system interface on an educational content server. The educational content server is coupled to a content database configured to access STEM-based cyber security educational content associated with one or more of: the training component, the knowledge component, and the collaborative component. Asynchronous delivery of the STEM-based cyber security educational content is provided to an end user computer in response to a user request. An interactive session is established between one or more experts and the end user computer to provide synchronous delivery of STEM-based cyber security materials. | 07-11-2013 |
20130186942 | GOLD REMOVAL FROM ELECTRONIC COMPONENTS - In some embodiments, a method removes gold plating on an electronic component. The method includes forming a gold and solder mixture on the electronic component via a first incrementally controlled heating procedure; incrementally cooling the electronic component via a first cooling procedure; wicking part or all of the gold and solder mixture from the electronic component to a metallic screen via a second incrementally controlled heating procedure; and incrementally cooling the electronic component via a second cooling procedure. | 07-25-2013 |
20130187684 | FAST GATE DRIVER FOR SILICON CARBIDE JUNCTION FIELD-EFFECT (JFET) SWITCHING DEVICES - Devices and techniques are described for selectively driving an electronically controllable switching device between on and off states. A first signal driver provides a respective output selectively switchable between “on” and “off” states responsive to an input signal. A second signal driver likewise provides a respective output selectively switchable between “on” and “off” states responsive to the input signal. Each of the respective outputs is switchable to an overriding isolated state responsive to an enable signal. The outputs are combined at a driving node, such that only one of the outputs drives the node at any given time. Additionally, one of the outputs is coupled to the output node through a current limiting resistor. Accordingly for each switching cycle, the switching device can be pre-charged by a high-current output, then held on for a predetermined period by a controlled-current output, and held off during other periods. | 07-25-2013 |
20130188328 | QUASI-ELECTRIC SHORT WALL - Provided is an assembly and process for isolating internal regions of an electromagnetic cavity from interfering electromagnetic radiation. The assembly includes a first portion defining a first electrically conducting broad wall and an elongated, electrically conducting isolating wall, coupled to and extending away from the first broad wall. The assembly also includes a second portion defining a second electrically conducting broad wall and an elongated, electrically conducting trough defined therein. The trough is sized to accept at least a portion of the isolating wall. The first and second portions are adapted for assembly in a facing arrangement in which the isolating wall is aligned with the trough. When assembled, a tip portion of the isolating wall extends to a uniform depth within the trough, such that the isolating wall-trough combination substantially rejects a transfer of electromagnetic energy across the isolating wall over at least a predetermined range of wavelengths. | 07-25-2013 |
20130194548 | PORTABLE RETINAL IMAGING DEVICE - A portable MEMS-based scanning laser ophthalmoscope (MSLO). In one example the MSLO includes a laser illumination sub-assembly that generates a laser illumination beam, a two-dimensional MEMS scan mirror configured to receive and scan the laser illumination beam over at least a portion of the retina of an eye to be imaged, an optical system configured to direct the laser illumination beam from the scan mirror into the eye to illuminate the retina, and a detector sub-assembly configured to intercept optical radiation reflected from the eye to generate an image of the retina. The optical system includes a polarized beamsplitter positioned between the scan minor and the eye and configured to direct the laser illumination beam to into the eye and to direct the optical radiation reflected from the eye to the detector sub-assembly. | 08-01-2013 |