Patent application number | Description | Published |
20110080768 | WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY - Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction. | 04-07-2011 |
20110080782 | WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY - Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction. | 04-07-2011 |
20110299324 | WRITE CURRENT COMPENSATION USING WORD LINE BOOSTING CIRCUITRY - Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction. | 12-08-2011 |
Patent application number | Description | Published |
20100085110 | Integrated Circuit Active Power Supply Regulation - Method and apparatus for compensating for voltage fluctuations on a voltage supply line in an integrated circuit device. In accordance with some embodiments, the apparatus includes a voltage fluctuation sensor which senses a voltage on the supply line, and a compensation circuit comprising a switch and a charge storage device (CSD). The switch actively connects the CSD to the supply line when the voltage sensed by the voltage fluctuation sensor passes outside a predetermined voltage range. | 04-08-2010 |
20100085797 | DUAL STAGE SENSING FOR NON-VOLATILE MEMORY - A method and apparatus for accessing a non-volatile memory cell. In some embodiments, a memory block provides a plurality of memory cells arranged into rows and columns. A read circuit is configured to read a selected row of the memory block by concurrently applying a control voltage to each memory cell along the selected row and, for each column, using a respective local sense amplifier and a column sense amplifier to successively differentiate a voltage across the associated memory cell in said column to output a programmed content of the row. | 04-08-2010 |
20110058405 | Memory Cell With Proportional Current Self-Reference Sensing - Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell. | 03-10-2011 |
20120014168 | Dual Stage Sensing for Non-Volatile Memory - A method and apparatus for accessing a non-volatile memory cell. In some embodiments, a memory block provides a plurality of memory cells arranged into rows and columns. A read circuit is configured to read a selected row of the memory block by concurrently applying a control voltage to each memory cell along the selected row and, for each column, using a respective local sense amplifier and a column sense amplifier to successively differentiate a voltage across the associated memory cell in said column to output a programmed content of the row. | 01-19-2012 |
Patent application number | Description | Published |
20100110762 | WRITE METHOD WITH VOLTAGE LINE TUNING - A method of writing to a resistive sense memory unit includes applying a first voltage across a resistive sense memory cell and a semiconductor transistor to write a first data state to the resistive sense memory cell. The first voltage forms a first write current for a first time duration through the resistive sense memory cell in a first direction. Then the method includes applying a second voltage across the resistive sense memory cell and the transistor to write a second data state to the resistive sense memory cell. The second voltage forms a second write current for a second duration through the resistive sense memory cell in a second direction. The second direction opposes the first direction, the first voltage has a different value than the second voltage, and the first duration is substantially the same as the second duration. | 05-06-2010 |
20100110763 | Write Current Compensation Using Word Line Boosting Circuitry - Apparatus and method for write current compensation in a non-volatile memory cell, such as but not limited to spin-torque transfer random access memory (STRAM) or resistive random access memory (RRAM). In accordance with some embodiments, a non-volatile memory cell has a resistive sense element (RSE) coupled to a switching device, the RSE having a hard programming direction and an easy programming direction opposite the hard programming direction. A voltage boosting circuit includes a capacitor which adds charge to a nominal non-zero voltage supplied by a voltage source to a node to generate a temporarily boosted voltage. The boosted voltage is applied to the switching device when the RSE is programmed in the hard programming direction. | 05-06-2010 |
20100110785 | Memory Cell With Proportional Current Self-Reference Sensing - Various embodiments of the present invention are generally directed to a method and apparatus for sensing a programmed state of a memory cell, such as a spin-torque transfer random access memory (STRAM) cell. A first read current is applied to the memory cell to generate a first voltage. A second read current is subsequently applied to the memory cell to generate a second voltage, with the second read current being proportional in magnitude to the first read current. A comparison is made between the first and second voltages to determine the programmed state of the memory cell. | 05-06-2010 |