Patent application number | Description | Published |
20080297253 | Single-Ended Gain Stage And Disk Drive - An electrical apparatus comprising an amplifier having a first input, a second input, and an output. The apparatus further comprises a first electrical path coupled to the first input and having a first resistance and a first electrical path coupled to the second input and having a second resistance. The apparatus further comprises a second electrical path coupled to the second input and having a third resistance and a second electrical path, comprising an electrically-controllable resistance, coupled between the output and the first input. Further, the apparatus comprises circuitry for controlling the electrically-controllable resistance for adjusting a ratio between the electrically-controllable resistance and the third resistance to approximate a ratio between the first resistance and the second resistance. | 12-04-2008 |
20090045865 | SQUARE-FUNCTION CIRCUIT - A square-function circuit includes an input field-effect transistor (FET) having a gate that is driven by an input voltage and is configured to conduct an output current. The circuit also includes a feedback circuit coupled to a source of the input FET, the feedback circuit being configured to drive a source of the input FET based on the output current to set a magnitude of the output current to be substantially equal to a square of the input voltage. | 02-19-2009 |
20100123442 | RECONFIGURABLE REGULATOR AND ASSOCIATED METHOD - One embodiment of the invention includes a regulator system that includes a high-side power transistor electrically connected between a first node and a second node. The system also includes a low-side power transistor electrically connected between the second node and a third node. The high and low-side power transistors can be controlled by high and low-side control signals, respectively. A mode controller provides at least one mode control signal having a value to enable operation of the regulator system in each of a buck switching, boost switching, negative switching, and linear regulator mode. The regulator system can utilize at least one of the high-side power transistor and the low-side power transistor to operate in the selected mode depending on at least one of an input voltage and an arrangement of external circuitry that are electrically coupled to at least one of the first, second, and third nodes to provide a regulated output voltage. | 05-20-2010 |
20110156942 | REDUCED AREA DIGITAL-TO-ANALOG CONVERTER - One embodiment of the invention includes a digital-to-analog converter (DAC) system. A resistive ladder comprises a plurality of resistors having an approximately equal resistance and is arranged in a respective plurality of resistive rungs between first and second ends of the resistive ladder. The first end of the resistive ladder can be coupled to an output and at least a portion of the plurality of resistors between the first end and the second end of the resistive ladder can have a physical size that is descending size-scaled in a direction from the first end of the resistive ladder to the second end of the resistive ladder. A switching circuit is configured to connect each of the plurality of resistive rungs to one of a first voltage and a second voltage based on a binary value of a digital input signal to generate a corresponding analog output voltage at the output. | 06-30-2011 |
20130200954 | BEMF MONITOR GAIN CALIBRATION STAGE IN HARD DISK DRIVE SERVO INTEGRATED CIRCUIT - A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved. | 08-08-2013 |
20140097774 | BACK ELECTROMAGNETIC FORCE (BEMF) SENSE SYSTEM - One embodiment includes a back-electromagnetic force (BEMF) sense system. The system includes a sense amplifier configured to measure an amplitude of a selected one of a plurality of phase voltages relative to a center tap voltage associated with a servo motor for the calculation of an associated BEMF voltage. The plurality of phase voltages can be provided to the sense amplifier via a respective plurality of control nodes. The selected one of the plurality of phase voltages on a respective one of the control nodes can be selected based on coupling the other of the plurality of control nodes associated with the other of the plurality of phase voltages to a voltage source configured to provide a predetermined voltage magnitude. | 04-10-2014 |
20140117903 | BACK EMF MONITOR FOR MOTOR CONTROL - An integrated circuit includes a motor current input voltage-to-current (VI) converter that receives a motor current sensor voltage from a motor and a reference voltage to generate an output current related to a motor's current. A motor current calibration VI converter compensates for errors in the motor current input VI converter and generates a calibration output current based on the reference voltage, wherein the output current and the calibration output current are combined to form an estimate of the motor's current. | 05-01-2014 |
20150346699 | BACK EMF MONITOR FOR MOTOR CONTROL - An integrated circuit includes a motor current input voltage-to-current (VI) converter that receives a motor current sensor voltage from a motor and a reference voltage to generate an output current related to a motor's current. A motor current calibration VI converter compensates for errors in the motor current input VI converter and generates a calibration output current based on the reference voltage, wherein the output current and the calibration output current are combined to form an estimate of the motor's current. | 12-03-2015 |