| Patent application number | Description | Published |
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| 20080296771 | METHODS OF FABRICATING SILICON CARBIDE POWER DEVICES BY AT LEAST PARTIALLY REMOVING AN N-TYPE SILICON CARBIDE SUBSTRATE, AND SILICON CARBIDE POWER DEVICES SO FABRICATED - A silicon carbide power device is fabricated by forming a p-type silicon carbide epitaxial layer on an n-type silicon carbide substrate, and forming a silicon carbide power device structure on the p-type silicon carbide epitaxial layer. The n-type silicon carbide substrate is at least partially removed, so as to expose the p-type silicon carbide epitaxial layer. An ohmic contact is formed on at least some of the p-type silicon carbide epitaxial layer that is exposed. By at least partially removing the n-type silicon carbide substrate and forming an ohmic contact on the p-type silicon carbide epitaxial layer, the disadvantages of using a p-type substrate may be reduced or eliminated. Related structures are also described. | 12-04-2008 |
| 20090072242 | Insulated Gate Bipolar Conduction Transistors (IBCTS) and Related Methods of Fabrication - Insulated gate bipolar conduction transistors (IBCTs) are provided. The IBCT includes a drift layer having a first conductivity type. An emitter well region is provided in the drift layer and has a second conductivity type opposite the first conductivity type. A well region is provided in the drift layer and has the second conductivity type. The well region is spaced apart from the emitter well region. A space between the emitter well region and the well region defines a JFET region of the IBCT. An emitter region is provided in the well region and has the first conductivity type and a buried channel layer is provided on the emitter well region, the well region and the JFET region and has the first conductivity type. Related methods of fabrication are also provided. | 03-19-2009 |
| 20090121319 | POWER SEMICONDUCTOR DEVICES WITH MESA STRUCTURES AND BUFFER LAYERS INCLUDING MESA STEPS - A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a lightly doped buffer layer having the first conductivity type on the base layer and forming a p-n junction with the base layer, and an emitter mesa having the first conductivity type on the buffer layer and having a sidewall. The buffer layer includes a mesa step adjacent to and spaced laterally apart from the sidewall of the emitter mesa, and a first thickness of the buffer layer beneath the emitter mesa is greater than a second thickness of the buffer layer outside the mesa step. | 05-14-2009 |
| 20090146154 | Transistor with A-Face Conductive Channel and Trench Protecting Well Region - A transistor structure optimizes current along the A-face of a silicon carbide body to form an AMOSFET that minimizes the JFET effect in the drift region during forward conduction in the on-state. The AMOSFET further shows high voltage blocking ability due to the addition of a highly doped well region that protects the gate corner region in a trench-gated device. The AMOSFET uses the A-face conduction along a trench sidewall in addition to a buried channel layer extending across portions of the semiconductor mesas defining the trench. A doped well extends from at least one of the mesas to a depth within the current spreading layer that is greater than the depth of the trench. A current spreading layer extends between the semiconductor mesas beneath the bottom of the trench to reduce junction resistance in the on-state. A buffer layer between the trench and the deep well further provides protection from field crowding at the trench corner. | 06-11-2009 |
| 20090189228 | SEMICONDUCTOR TRANSISTOR WITH P TYPE RE-GROWN CHANNEL LAYER - The invention is a device for controlling conduction across a semiconductor body with a P type channel layer between active semiconductor regions of the device and the controlling gate contact. The device, often a MOSFET or an IGBT, includes at least one source, well, and drift region. The P type channel layer may be divided into sections, or divided regions, that have been doped to exhibit N type conductivity. By dividing the channel layer into regions of different conductivity, the channel layer allows better control over the threshold voltage that regulates current through the device. Accordingly, one of the divided regions in the channel layer is a threshold voltage regulating region. The threshold-voltage regulating region maintains its original P type conductivity and is available in the transistor for a gate voltage to invert a conductive zone therein. The conductive zone becomes the voltage regulated conductive channel within the device. | 07-30-2009 |
| 20090212301 | Double Guard Ring Edge Termination for Silicon Carbide Devices and Methods of Fabricating Silicon Carbide Devices Incorporating Same - Edge termination structures for semiconductor devices are provided including a plurality of spaced apart concentric floating guard rings in a semiconductor layer that at least partially surround a semiconductor junction. The spaced apart concentric floating guard rings have a highly doped portion and a lightly doped portion. Related methods of fabricating devices are also provided herein. | 08-27-2009 |
| 20090289262 | JUNCTION BARRIER SCHOTTKY DIODES WITH CURRENT SURGE CAPABILITY - An electronic device includes a silicon carbide drift region having a first conductivity type, a Schottky contact on the drift region, and a plurality of junction barrier Schottky (JBS) regions at a surface of the drift region adjacent the Schottky contact. The JBS regions have a second conductivity type opposite the first conductivity type and have a first spacing between adjacent ones of the JBS regions. The device further includes a plurality of surge protection subregions having the second conductivity type. Each of the surge protection subregions has a second spacing between adjacent ones of the surge protection subregions that is less than the first spacing. | 11-26-2009 |
| 20090315036 | SEMICONDUCTOR DEVICES INCLUDING SCHOTTKY DIODES HAVING DOPED REGIONS ARRANGED AS ISLANDS AND METHODS OF FABRICATING SAME - A semiconductor device according to some embodiments includes a semiconductor layer having a first conductivity type and a surface in which an active region of the semiconductor device is defined. A plurality of spaced apart first doped regions are arranged within the active region. The plurality of first doped regions have a second conductivity type that is opposite the first conductivity type, have a first dopant concentration, and define a plurality of exposed portions of the semiconductor layer within the active region. The plurality of first doped regions are arranged as islands in the semiconductor layer. A second doped region in the semiconductor layer has the second conductivity type and has a second dopant concentration that is greater than the first dopant concentration. | 12-24-2009 |
| 20100032685 | MESA TERMINATION STRUCTURES FOR POWER SEMICONDUCTOR DEVICES AND METHODS OF FORMING POWER SEMICONDUCTOR DEVICES WITH MESA TERMINATION STRUCTURES - An electronic device includes a drift layer having a first conductivity type, a buffer layer having a second conductivity type, opposite the first conductivity type, on the drift layer and forming a P—N junction with the drift layer, and a junction termination extension region having the second conductivity type in the drift layer adjacent the P—N junction. The buffer layer includes a step portion that extends over a buried portion of the junction termination extension. Related methods are also disclosed. | 02-11-2010 |
| 20100133549 | Semiconductor Devices with Current Shifting Regions and Related Methods - A semiconductor device may include a semiconductor buffer layer having a first conductivity type and a semiconductor mesa having the first conductivity type on a surface of the buffer layer. In addition, a current shifting region having a second conductivity type may be provided adjacent a corner between the semiconductor mesa and the semiconductor buffer layer, and the first and second conductivity types may be different conductivity types. Related methods are also discussed. | 06-03-2010 |
| 20100133550 | STABLE POWER DEVICES ON LOW-ANGLE OFF-CUT SILICON CARBIDE CRYSTALS - A silicon carbide-based power device includes a silicon carbide drift layer having a planar surface that forms an off-axis angle with a < | 06-03-2010 |
| 20100140628 | Insulated gate bipolar transistors including current suppressing layers - An insulated gate bipolar transistor (IGBT) includes a first conductivity type substrate and a second conductivity type drift layer on the substrate. The second conductivity type is opposite the first conductivity type. The IGBT further includes a current suppressing layer on the drift layer. The current suppressing layer has the second conductivity type and has a doping concentration that is larger than a doping concentration of the drift layer. A first conductivity type well region is in the current suppressing layer. The well region has a junction depth that is less than a thickness of the current suppressing layer, and the current suppressing layer extends laterally beneath the well region. A second conductivity type emitter region is in the well region. | 06-10-2010 |
| 20100244047 | Methods of Forming Semiconductor Devices Including Epitaxial Layers and Related Structures - A method of forming a semiconductor device may include forming a terminal region of a first conductivity type within a semiconductor layer of the first conductivity type. A well region of a second conductivity type may be formed within the semiconductor layer wherein the well region is adjacent at least portions of the terminal region within the semiconductor layer, a depth of the well region into the semiconductor layer may be greater than a depth of the terminal region into the semiconductor layer, and the first and second conductivity types may be different. An epitaxial semiconductor layer may be formed on the semiconductor layer, and a terminal contact region of the first conductivity type may be formed in the epitaxial semiconductor layer with the terminal contact region providing electrical contact with the terminal region. In addition, an ohmic contact may be formed on the terminal contact region. Related structures are also discussed. | 09-30-2010 |
| 20100283529 | WIDE BANDGAP BIPOLAR TURN-OFF THYRISTOR HAVING NON-NEGATIVE TEMPERATURE COEFFICIENT AND RELATED CONTROL CIRCUITS - An electronic device includes a wide bandgap thyristor having an anode, a cathode, and a gate terminal, and a wide bandgap bipolar transistor having a base, a collector, and an emitter terminal. The emitter terminal of the bipolar transistor is directly coupled to the anode terminal of the thyristor such that the bipolar transistor and the thyristor are connected in series. The bipolar transistor and the thyristor define a wide bandgap bipolar power switching device that is configured to switch between a nonconducting state and a conducting state that allows current flow between a first main terminal corresponding to the collector terminal of the bipolar transistor and a second main terminal corresponding to the cathode terminal of the thyristor responsive to application of a first control signal to the base terminal of the bipolar transistor and responsive to application of a second control signal to the gate terminal of the thyristor. Related control circuits are also discussed. | 11-11-2010 |
| 20100289032 | DIFFUSED JUNCTION TERMINATION STRUCTURES FOR SILICON CARBIDE DEVICES AND METHODS OF FABRICATING SILICON CARBIDE DEVICES INCORPORATING SAME - An electronic device includes a silicon carbide layer having a first conductivity type and a main junction adjacent a surface of the silicon carbide layer, and a junction termination region at the surface of the silicon carbide layer adjacent the main junction. Charge in the junction termination region decreases with lateral distance from the main junction, and a maximum charge in the junction termination region may be less than about 2×10 | 11-18-2010 |
| 20100301335 | High Voltage Insulated Gate Bipolar Transistors with Minority Carrier Diverter - High power insulated gate bipolar junction transistors are provided that include a wide band gap semiconductor bipolar junction transistor (“BJT”) and a wide band gap semiconductor MOSFET that is configured to provide a current to the base of the BJT. These devices further include a minority carrier diversion semiconductor layer on the base of the BJT and coupled to the emitter of the BJT, the minority carrier diversion semiconductor layer having a conductivity type opposite the conductivity type of the base of the BJT and forming a heterojunction with the base of the BJT. | 12-02-2010 |
| 20100301929 | Power Switching Devices Having Controllable Surge Current Capabilities - Semiconductor switching devices include a wide band-gap power transistor, a wide band-gap surge current transistor that coupled in parallel to the power transistor, and a wide hand-gap driver transistor that is configured to drive the surge current transistor. Substantially all of the on-state output current of the semiconductor switching device flows through the channel of the power transistor when a drain-source voltage of the power transistor is within a first voltage range, which range may correspond, for example, to the drain-source voltages expected during normal operation. In contrast, the semiconductor switching device is further configured so that in the on-state the output current flows through both the surge current transistor and the channel of the power transistor when the drain-source voltage of the power transistor is within a second, higher voltage range. | 12-02-2010 |
| 20100308337 | Schottky Diodes Including Polysilicon Having Low Barrier Heights and Methods of Fabricating the Same - Hybrid semiconductor devices including a PIN diode portion and a Schottky diode portion are provided. The PIN diode portion is provided on a semiconductor substrate and has an anode contact on a first surface of the semiconductor substrate. The Schottky diode portion is also provided on the semiconductor substrate and includes a polysilicon layer on the semiconductor substrate and a ohmic contact on the polysilicon layer. Related Schottky diodes are also provided herein. | 12-09-2010 |
| 20110012129 | High-Gain Wide Bandgap Darlington Transistors and Related Methods of Fabrication - A packaged power electronic device includes a wide bandgap bipolar driver transistor having a base, a collector, and an emitter terminal, and a wide bandgap bipolar output transistor having a base, a collector, and an emitter terminal. The collector terminal of the output transistor is coupled to the collector terminal of the driver transistor, and the base terminal of the output transistor is coupled to the emitter terminal of the driver transistor to provide a Darlington pair. An area of the output transistor is at least 3 times greater than an area of the driver transistor in plan view. For example, an area ratio of the output transistor to the driver transistor may be between about 3:1 to about 5:1. Related devices and methods of fabrication are also discussed. | 01-20-2011 |
| 20110012130 | High Breakdown Voltage Wide Band-Gap MOS-Gated Bipolar Junction Transistors with Avalanche Capability - High power wide band-gap MOSFET-gated bipolar junction transistors (“MGT”) are provided that include a first wide band-gap bipolar junction transistor (“BJT”) having a first collector, a first emitter and a first base, a wide band-gap MOSFET having a source region that is configured to provide a current to the base of the first wide band-gap BJT and a second wide band-gap BJT having a second collector that is electrically connected to the first collector, a second emitter that is electrically connected to the first emitter, and a second base that is electrically connected to the first base. | 01-20-2011 |
| 20110049561 | Solid-State Pinch Off Thyristor Circuits - Provided is a semiconductor bistable switching device that includes a thyristor portion including an anode layer, a drift layer, a gate layer and a cathode layer, the gate layer operable to receive a gate trigger current that, when the anode layer is positively biased relative to the cathode layer, causes the thyristor portion to latch into a conducting mode between the anode and the cathode. The device also includes a transistor portion formed on the thyristor portion, the transistor portion including a source, a drain and a transistor gate, the drain coupled to the cathode of the thyristor portion. | 03-03-2011 |
| 20110084284 | Transistors with Semiconductor Interconnection Layers and Semiconductor Channel Layers of Different Semiconductor Materials - A transistor may include a semiconductor drift layer of a first semiconductor material and a semiconductor channel layer on the semiconductor drift layer. The semiconductor channel layer may include a second semiconductor material different than the first semiconductor material. A semiconductor interconnection layer may be electrically coupled between the semiconductor drift layer and the semiconductor channel layer, and the semiconductor interconnection layer may include a third semiconductor material different than the first and second semiconductor materials. In addition, a control electrode may be provided on the semiconductor channel layer. | 04-14-2011 |
| 20110101374 | MONOLITHIC HIGH VOLTAGE SWITCHING DEVICES AND RELATED METHODS OF FABRICATING THE SAME - Metal oxide semiconductor (MOS) power devices are provided including a MOS channel including a semiconductor material having high electron mobility on a silicon carbide (SiC) layer. Related methods are also provided herein. | 05-05-2011 |
| 20110101375 | Power Semiconductor Devices Having Selectively Doped JFET Regions and Related Methods of Forming Such Devices - Semiconductor switching devices include a wide band-gap drift layer having a first conductivity type (e.g., n-type), and first and second wide band-gap well regions having a second conductivity type (e.g., p-type) on the wide band-gap drift layer. First and second wide band-gap source/drain regions of the first conductivity type are on the first and second wide band-gap well regions, respectively. A wide band-gap JFET region having the first conductivity type is provided between the first and second well regions. This JFET region includes a first local JFET region that is adjacent a side surface of the first well region and a second local JFET region that is adjacent a side surface of the second well region. The local JFET regions have doping concentrations that exceed a doping concentration of a central portion of the JFET region that is between the first and second local JFET regions of the JFET region. | 05-05-2011 |
| 20110121318 | Silicon Carbide Switching Devices Including P-Type Channels - Methods of forming a p-channel MOS device in silicon carbide include forming an n-type well in a silicon carbide layer, and implanting p-type dopant ions to form a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is formed in the channel region. The implanted ions are annealed in an inert atmosphere at a temperature greater than 1650° C. A gate oxide layer is formed on the channel region, and a gate is formed on the gate oxide layer. A silicon carbide-based transistor includes a silicon carbide layer, an n-type well in the silicon carbide layer, and a p-type region in the n-type well at a surface of the silicon carbide layer and at least partially defining a channel region in the n-type well adjacent the p-type region. A threshold adjustment region is in the channel region and includes p-type dopants at a dopant concentration of about 1×10 | 05-26-2011 |
