Patent application number | Description | Published |
20100297968 | CIRCUITS AND METHODS FOR COMBINING SIGNAL POWER - The present disclosure includes techniques for combining signal power. In one embodiment, a plurality of power amplifiers generate amplified signals. A plurality of first transmission lines are electrically coupled outputs of the power amplifiers. Second transmission lines are magnetically coupled to the first transmission lines to receive the amplified signals. The amplified signals propagate down the second transmission lines to a central conductive region to a node. The amplified signals are added at the node. The node is coupled to an antenna terminal. | 11-25-2010 |
20120161870 | FIGURE 8 BALUN - A balun includes a first set of wound conductors includes a first loop portion and a second loop portion. The first loop portion and the second loop portion are conductively coupled and form a first figure eight structure. The balun further includes a second set of wound conductors includes a third loop portion and a fourth loop portion. The third loop portion and the fourth loop portion are conductively coupled and form a second figure eight structure. The first loop portion and the third loop portion are inductively coupled. The second loop portion and the fourth loop portion are inductively coupled. | 06-28-2012 |
20120161871 | CMOS Push-Pull Power Amplifier With Even-Harmonic Cancellation - A power amplifier includes a push-pull pair of transistors including a first transistor inductively coupled to a voltage source and coupled to a ground, and a second transistor inductively coupled to the ground and coupled to the voltage source. Gates of the first and the second transistors are AC inputs configured to receive an AC signal having a fundamental frequency. Drain regions of the first and the second transistors are, respectively, first and second output nodes. The power amplifier further includes a capacitor coupled between the first output node and the second output node and where the capacitor is configured as a pathway for cancellation of even harmonic signals of the fundamental frequency of the AC signal. | 06-28-2012 |
20120161876 | ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION - A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled. | 06-28-2012 |
20120161879 | TECHNIQUES TO IMPROVE THE STRESS ISSUE IN CASCODE POWER AMPLIFIER DESIGN - An amplifier includes a first transistor, and a first inductor disposed between the first transistor and a voltage source. A first output node is between the first transistor and the first inductor. The amplifier further includes a second inductor disposed between the first transistor and ground. The amplifier further includes a second transistor, and a third inductor disposed between the second transistor and a ground. A second output node is between the second transistor and the third inductor. The amplifier further includes a fourth inductor disposed between the second transistor and the voltage source. The amplifier further includes a first capacitor disposed between the first output node and the second output node, and a second capacitor disposed between a first mid-node, which is between the first transistor and the first inductor, and a second mid-node, which is between the second transistor and fourth inductor. | 06-28-2012 |
20120161880 | TECHNIQUES ON INPUT TRANSFORMER TO PUSH THE OP1dB HIGHER IN POWER AMPLIFIER DESIGN - A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node. | 06-28-2012 |
20130099865 | LOW-STRESS CASCODE STRUCTURE - An amplifier system comprises a cascode common-source (CS) amplifier including a plurality of transistors connected in a common-source configuration. A stress reducing circuit is connected to at least one of the plurality of transistors to equalize a voltage drop across the plurality of transistors. The stress reducing circuit includes a first transistor including a control terminal, a first terminal and a second terminal. The second terminal of the first transistor is connected to a first terminal of a first one of the plurality of transistors. A capacitance has a first terminal connected to the control terminal of the first transistor and a second terminal connected to a control terminal of a second one of the plurality of transistors. | 04-25-2013 |
20130214987 | FIGURE 8 BALUN - A balun includes a first conductor winding having a first figure eight shape and a second conductor winding have a second figure eight shape. The first figure eight shape includes a first loop and a second loop. The second figure eight shape includes a third loop and a fourth loop. The first loop and the second loop are not concentric. The third loop and the fourth loop are not concentric. | 08-22-2013 |
20130300506 | ACCURATE BIAS TRACKING FOR PROCESS VARIATION AND SUPPLY MODULATION - A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled. | 11-14-2013 |
20130300507 | POWER AMPLIFIER WITH FEEDBACK IMPEDANCE FOR STABLE OUTPUT - An amplifier circuit amplifies a signal for wireless transmission. A feedback circuit, including a capacitor, is coupled to the amplifier circuit. Components of the feedback circuit are selected based on a feedback factor such that an input impedance to the amplifier circuit has a same impedance characteristic as a feedback circuit impedance of the feedback circuit. | 11-14-2013 |
20140085165 | COMBINING SIGNAL POWER USING MAGNETIC COUPLING BETWEEN CONDUCTORS - A system including a plurality of amplifiers, a plurality of first transmission lines, and a plurality of second transmission lines. The plurality of first transmission lines have first ends respectively connected to outputs of the plurality of amplifiers and second ends connected to a reference potential. The plurality of second transmission lines have first ends connected to a conductor and second ends that are unconnected. Signals output by the plurality of amplifiers to the plurality of first transmission lines are respectively magnetically coupled to the plurality of second transmission lines. | 03-27-2014 |
20140125417 | SYSTEMS AND METHODS FOR BOOSTING A RECEIVED AC SIGNAL USING A POWER AMPLIFIER INCLUDING PHASE CONDITIONERS - A power amplifier configured to boost an AC signal. The power amplifier includes a first transistor, a second transistor, a first inductor connected between the first transistor and a voltage source, and a second inductor connected between the second transistor and ground. A first phase conditioner arranged at an input of the first transistor is configured to condition a phase of the AC signal such that the AC signal as received by the first transistor is out of phase with respect to the AC signal as received by the first inductor. A second phase conditioner arranged at an input of the second transistor is configured to condition a phase of the AC signal such that the AC signal as received by the second transistor is out of phase with respect to the AC signal as received by the second inductor. | 05-08-2014 |
20140203874 | POWER AMPLIFIERS WITH PUSH-PULL TRANSISTORS, CAPACITIVE COUPLING FOR HARMONIC CANCELLATION, AND INDUCTIVE COUPLING TO PROVIDE DIFFERENTIAL OUTPUT SIGNALS - A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal. | 07-24-2014 |
20140240046 | SYSTEMS AND METHODS FOR OPERATING A POWER AMPLIFIER - A power amplifier configured to receive an AC input signal and output, based on the AC input signal, an output voltage via a first output voltage terminal and a second output voltage terminal. The power amplifier includes a first transistor and a second transistor connected in a push-pull configuration, a first inductor, a second inductor, and a first capacitor. The first output voltage terminal is located between the first inductor and the first transistor. The second output voltage terminal is located between the second transistor and ground. The first capacitor is configured to provide a first circuit path between the first output voltage terminal and the second output voltage terminal. The first circuit path functions as a short circuit for even harmonics of a fundamental frequency of the AC input signal but does not function as a short circuit for the fundamental frequency of the AC input signal. | 08-28-2014 |
20140266467 | SYSTEM AND METHOD FOR REDUCING STRESS IN A CASCODE COMMON-SOURCE AMPLIFIER - A method of reducing stress in a cascode common-source amplifier including a first transistor and a second transistor connected in a cascode arrangement. The method includes providing an input voltage and a bias voltage to the first transistor and the second transistor, respectively, connected in the cascode arrangement, generating, based on the input voltage and the bias voltage, an output current, and equalizing stress associated with operation of each of the first transistor and the second transistor. Equalizing the stress includes, in response to the input voltage decreasing by an amount sufficient to cause the first transistor and the second transistor to turn off, equalizing respective voltage drops across the first transistor and the second transistor. | 09-18-2014 |
20140333387 | CONDUCTOR WINDING AND INDUCTORS ARRANGED TO FORM A BALUN HAVING A FIGURE EIGHT SHAPE - A balun including a first conductor winding, a first inductor, a second inductor, a third inductor, and a fourth inductor. The first conductor winding has a figure eight shape including a first loop and a second loop. The first inductor and the second inductor substantially surround the first loop. The third inductor and the fourth inductor substantially surround the second loop. | 11-13-2014 |