| Patent application number | Description | Published |
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| 20090073871 | COMMUNICATION APPARATUS AND NETWORK SEARCH METHOD THEREOF - A network search method for a communication apparatus connected to a network is disclosed. The method comprises the following steps. The communication apparatus enters a sleep mode when the communication apparatus loses signals from the network. Then, power status of the communication apparatus is detected. A trigger signal is automatically sent when a change in power status of the communication apparatus is found. Next, a radio frequency module is enabled to search for the signals from the network according to the trigger signal so as to re-connect to the network. | 03-19-2009 |
| 20110019600 | MOBILE DEVICE AND DATA CONNECTION METHOD THEREOF - A mobile device with a port map maintaining a list of open ports for incoming data packets is provided. A first processor receives and demodulates inbound signals into data packets. A second processor processes at least one application bound to at least one open port. The second processor enters a sleep mode to reduce power consumption if no data packet is sent from the first processor to the second processor. When the first processor receives an inbound request signal, the first processor demodulates the inbound request signal into a first data packet targeted to a destination port, and looks up the port map to determine whether the destination port is listed in the port map. If the destination port is not listed in the port map, the first processor transmits a response signal to the sender of the inbound request signal or omits the inbound request signal without waking up the second processor. | 01-27-2011 |
| 20110211505 | USER EQUIPMENT, TELECOMMUNICATIONS SYSTEM AND MESSAGE RECOVERY METHOD - A user equipment (UE) implementing a message recovery method is disclosed, supporting messages of both the circuit switched (CS) domain and the packet switched (PS) domain. The UE roams in a wireless telecommunications system and performs a call setup procedure. When the UE receives an NAS message comprising a domain identifier and a protocol discriminator, the UE determines whether the domain identifier and the protocol discriminator are of the same domain. If the domain identifier and the protocol discriminator are of the same domain, the UE proceeds with processes corresponding to the NAS message. If the domain identifier and the protocol discriminator are of different domains, the NAS message is determined to be an error message, and the UE modifies the domain identifier of the NAS message to generate a recovered NAS message, and determines whether the recovered NAS message is compatible to the call setup procedure. | 09-01-2011 |
| Patent application number | Description | Published |
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| 20100180141 | METHOD OF DYNAMICALLY ADJUSTING SIGNAL DELAY TIME OF CIRCUIT SYSTEM - A circuit system periodically checks a system-environment monitor value, and then obtains a system-environment monitor value index corresponding to the system-environment monitor value in the environment-adjustment look-up table. Finally, the circuit system adjusts a signal delay time according to a delay adjustment value corresponding to the system-environment monitor value index. | 07-15-2010 |
| 20100299488 | DYNAMIC MEMORY ACCESS METHOD AND MEMORY CONTROLLER - A dynamic memory access method includes following steps. First, many data access commands are received. Each of the data access commands accesses a dynamic memory according to a page address and a bank address. Next, whether an access data to be accessed by the corresponding data access command is an instantaneous data or a non-instantaneous data is determined. Then, the page and bank addresses of each of the data access commands are respectively compared with a previously page and bank addresses at a previous time used for accessing the dynamic memory, such that an address hit status is obtained. Next, a service sequence is generated according to whether each of the data access commands is an instantaneous or instantaneous data and the address hit status of the commands. Finally, each of the data access commands is executed to access the dynamic memory sequentially according to the service sequence. | 11-25-2010 |
| 20110219198 | MEMORY CONTROL SYSTEM AND METHOD - A memory control system includes a first queue unit, a second queue unit, a first transforming unit, a second transforming unit, an arbiter and a control unit. The first queue unit temporarily stores multiple first request instructions. The second queue unit temporarily stores multiple second request instructions. The first transforming unit selectively re-assigns memory addresses corresponding to these first request instructions. The second transforming unit selectively re-assigns memory addresses corresponding to these second request instructions. The arbiter performs immediate scheduling of the first request instructions and the second request instructions to the memory. The control unit compares bandwidths of the first request instructions with bandwidths of the second request instructions, and controls the first transforming unit and the second transforming unit to perform re-assigning operations or not according to compared results. | 09-08-2011 |
| 20110235722 | Computer system architecture - A computer system architecture including a first buffer, a second buffer, a sub-system and a CPU is provided. The sub-system carries out a first task to obtain first returned information, stores the first returned information in the first buffer and sets up a first occupancy flag to the first buffer. Next, the sub-system carries out a second task to obtain second returned information, stores the second returned information in the second buffer, and sets up a second occupancy flag to the second buffer. The CPU reads the first returned information and eliminates the first occupancy flag. After the second returned information is stored in the second buffer and the first occupancy flag is eliminated, the sub-system continuously carries out a third task to obtain third returned information, stores the third returned information in the first buffer, and sets up the first occupancy flag to the first buffer. | 09-29-2011 |
| 20110296134 | ADAPTIVE ADDRESS TRANSLATION METHOD FOR HIGH BANDWIDTH AND LOW IR CONCURRENTLY AND MEMORY CONTROLLER USING THE SAME - An adaptive memory address translation method includes the following steps. Multiple request instructions are received. A memory address corresponding to each request instruction includes a bank address. The memory addresses corresponding to the request instructions are translated, such that the bank addresses corresponding to at least one part of the any two adjacent request instructions are different. A numerical translation is utilized to translate the memory addresses corresponding to the request instructions, such that the memory addresses corresponding to the any two adjacent request instructions have less different bits. | 12-01-2011 |
