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Pileggi
Antonello Pileggi, Aventura, FL US
| Patent application number | Description | Published |
|---|---|---|
| 20100204683 | THERAPEUTIC HYBRID IMPLANTABLE DEVICES | 08-12-2010 |
Larry Pileggi, Pittsburgh, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20080243461 | METHOD AND APPARATUS FOR THERMAL MODELING AND ANALYSIS OF SEMICONDUCTOR CHIP DESIGNS - A method and apparatus for modeling and thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal testing of a semiconductor chip design includes calculating full-chip temperatures over the semiconductor chip design (e.g., to identify steep thermal gradients) and modeling the full-chip temperatures in accordance with a geometric multi-grid technique. The geometric multi-grid technique is tailored to determine temperatures within the semiconductor chip design based at least in part on the physical attributes or geometry of the design. | 10-02-2008 |
Lawrence T. Pileggi, Pittsburgh, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20090089731 | TUNABLE INTEGRATED CIRCUIT DESIGN FOR NANO-SCALE TECHNOLOGIES - The invention discloses a method for tuning nano-scale analog-circuit designs in order to reduce random-device mismatches and optimize said design, where nano-scale devices potentially have large-scale process variations. The method includes providing a tunable circuit topology, wherein each nano-scale device comprises a single component or comprises multiple parallel components. Each component is decomposed into multiple discrete sub-components, wherein each said sub-component either operates in parallel with other like components to effectively operate like one bigger component. The sub-components are subjected to a dynamic-programming process to adaptively select the sub-components to be kept operational, while configuring the nonselected sub-components to be nonoperational, based on the measurement of at least one operational parameter. | 04-02-2009 |
| 20100162193 | METHOD AND PROCESS FOR DESIGN OF INTEGRATED CIRCUITS USING REGULAR GEOMETRY PATTERNS TO OBTAIN GEOMETRICALLY CONSISTENT COMPONENT FEATURES - The invention provides a method and process for designing an integrated circuit based on using the results from both 1) a specific set of silicon test structure characterizations and 2) the decomposition of logic into combinations of simple logic primitives, from which a set of logic bricks are derived that can be assembled for a manufacturable-by-construction design. This implementation of logic is compatible with the lithography settings that are used for implementation of the memory blocks and other components on the integrated circuit, particularly by implementing geometrically consistent component features. The invention provides the ability to recompile a design comprised of logic and memory blocks onto a new geometry fabric to implement a set of technology-specific design changes, without requiring a complete redesign of the entire integrated circuit. | 06-24-2010 |
| 20100318947 | METHOD FOR THE DEFINITION OF A LIBRARY OF APPLICATION-DOMAIN-SPECIFIC LOGIC CELLS - The present invention provides in one aspect a method of defining a logic cell library composed of complex functions and simple functions, with some of the complex functions obtained from identifying logic function patterns. In another aspect the present invention provides a method of designing a representation of an integrated circuit that uses complex functions and simple functions, with the complex functions including a plurality of non-standard complex Boolean logic functions that are determined to collectively provide for logic pattern minimization. | 12-16-2010 |
| 20110050281 | METHOD AND SYSTEM FOR GROUPING LOGIC IN AN INTEGRATED CIRCUIT DESIGN TO MINIMIZE NUMBER OF TRANSISTORS AND NUMBER OF UNIQUE GEOMETRY PATTERNS - A method and system are described to group logic terms at a higher level of abstraction than that found using standard cells to implement the logic functions using a reduced number of transistors, and to reduce the total number of unique geometry patterns needed to create the integrated circuit implementation. By grouping the logic functions in terms of a larger number of literals (logic variable inputs), the functions can be implemented in terms of a number of transistors that is often less and no more than equal to that which is required for implementing the same function with a number of logic primitives, or simpler standard logic cells. The optimized transistor level designs are further optimized and physically constructed to reduce the total number of unique geometry patterns required to implement the integrated circuit. | 03-03-2011 |
Lisa Pileggi, Newmarket CA
| Patent application number | Description | Published |
|---|---|---|
| 20080311336 | Foam Laminate Product and Process for Production Thereof - A laminate product comprising a foam core having a pair of opposed major surfaces and a cover layer secured with respect to each major surface is described. The cover layer comprises a polymeric substrate having disposed therein a plurality of reinforcing fibrous material. It has been found that it is possible to produce a foam laminate product having improved stiffness if a lower amount of reinforcing material is used for a given amount of polymer substrate. In particular, it has been found possible to provide an improved foam laminate product having a relatively high ratio of stiffness to weight of reinforcing fibrous material. It has been further discovered that the stiffness of the resulting foam laminate product can be increased when the polymer substrate and the reinforcing fibrous material are present in a weight ratio of greater than 2.5. This is believed to be the result of improved encapsulation of the reinforcing fibrous material by the polymer substrate. | 12-18-2008 |
| 20090284048 | FOAM LAMINATE PRODUCT AND PROCESS FOR PRODUCTION THEREOF - A laminate product particularly useful in vehicular applications is described. The laminate product comprises a foam core having a first major surface and a second major surface. One or both of the major surfaces comprises a fibrous layer and an adhesive layer adhering the fibrous layer to the foam core. The process for producing the laminate product involves exposing an initial laminate product to infrared radiation. A portion of the adhesive layer between fibres in fibrous layer being ablated. The foam laminate product has improved sound absorption properties and while maintaining desirable strength and stiffness properties. In addition, in certain cases, the peel strength of the fibrous reinforcing layer to the foam core is significantly improved in the present foam laminate product compared to the conventional approaches. | 11-19-2009 |
Nicholas D. Pileggi, Winter Springs, FL US
| Patent application number | Description | Published |
|---|---|---|
| 20100126251 | Hall Effect-Based Real-Time Lubrication Monitoring System Modes of Operation and Use Thereof - The invention relates to a system for real-time monitoring of motile lubricants within the presently common reciprocating engine. A sensor array is fully submerged (or partially submerged) within the lubricant system fluid, for example, oil. The fluid property monitoring is accomplished by multiple sensors acting in unison to provide data to a remote processing and display portion of the system. The system allows for the unified data acquisition and real-time comparison by providing both a physical sensor unit with embedded multiple sensors of multiple types as well as multiple DSP (Digital Signal Processing) or microcontroller modules acting in parallel to provide best-fit results for purposes of real-time monitoring high-temperature motile lubricants for property degradation (namely viscosity and foreign particulate detection) and particulate accumulation. | 05-27-2010 |
Rafael Giuliano Pileggi, City Of Sao Paulo BR
| Patent application number | Description | Published |
|---|---|---|
| 20100320641 | PROCESS TO OBTAIN BASIC CONSTRUCTION ELEMENTS FORMED BY CEMENT AND RESIDUAL MATERIAL - A process for obtaining basic construction elements formed by cement and residual material for building basic artifacts for civil construction, involving, cement aggregated to mineral residues, the process includes the following steps: accumulation of raw material: formed by cement material found in nature or derived from mining and industrial processes and in this case, there is no single field; homogenization or mixture: is performed manually or by machinery, such as front-end loaders, according to percentage of each raw material used, obtaining an unique and homogenous plaster; disintegration of raw material such as cement, lamination, homogenization, involving specific machinery with a new purge of residual rejects and finally, a temporary bulk storage. | 12-23-2010 |
Vincent J. Pileggi, Warwick, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20110145994 | MULTI-ADJUSTABLE PILLOW - A pillow having a first pillow and a second smaller pillow attached to a face of the main pillow by an attachment member that is of sufficient length and flexibility to allow the second pillow to be positioned in an infinite number of parallel and/or skewed orientations relative to the first pillow. A third pillow, also smaller than the first pillow, can be attached to the first pillow on a face opposite the second pillow by another attachment member that is of sufficient length and flexibility to allow the second pillow to be positioned relative to the first pillow and second pillow in an infinite number of parallel and/or skewed orientations. The invention provides a fully formed pillow and a pillow cover. | 06-23-2011 |